MPQ28261 – 21V, 3A, 500kHz SYNCHRONOUS STEP-DOWN CONVERTER

MPQ28261 Rev. 1.12

www.MonolithicPower.com

12

10/10/2013

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OPERATION

The

MPQ28261

is

a

high-frequency,

synchronous, rectified, step-down, switch mode

converter with built-in internal power MOSFETs.

It offers a very compact solution to output a 3A

continuous output current over a wide input

supply range, with excellent load and line

regulation.

The MPQ28261 operates in a fixed-frequency

peak-current–control mode to regulate the

output voltage. Around the start of a PWM cycle,

the integrated high-side power MOSFET (HS-

FET) turns on and remains on until its current

reaches the value set by the COMP voltage.

When the power switch turns off, it remains off

until the next clock cycle starts. If the current in

the HS-FET does not reach the COMP set

value for 90% of one PWM period, the HS-FET

will turn off.

Error Amplifier

current proportional to the difference. The

output current both charges and discharges the

internal compensation network to form the

COMP voltage, which controls the power

MOSFET current. The optimized internal

compensation network minimizes the external

component counts and simplifies the control

loop design.

Internal Regulator

The 5V regulator powers most of the internal

5.1V, the regulator outputs at its maximum level;

The regulator requires a 0.1µF ceramic

capacitor for decoupling purposes.

Configuring the Enable Control

The MPQ28261 has a dedicated Enable control

pin (EN): pulling this pin high or low enables or

for automatic start up. Choose the values of the

EN pin to GND) to determine the automatic

start-up voltage:

UP

DOWN

IN START

DOWN

(R

R

)

V1.4

(V)

R

−

+

=×

To reduce noise, add a 10nF ceramic capacitor

from EN to GND.

An internal zener diode on the EN pin clamps

the EN pin voltage to prevent run away. The

maximum pull up current assuming the worst

case 6V for the internal zener clamp should be

less than 0.2mA.

Therefore, when driving EN with an external

logic signal, use an EN voltage less than 6V.

When connecting EN to IN through a pull-up

resistor or a resistive voltage divider, select a

resistance that ensures a maximum pull-up

current less than 0.2mA.

exceeds 6V, then the minimum resistance for

IN

UP

DOWN

V6V

6V

0.2mA

RR

−

−≤

not connected), then the VCC UVLO threshold

value is:

IN

UP

V6V

R( )

0.2mA

−

≥Ω

Under-Voltage Lockout

Under-voltage lockout (UVLO) protects the chip

from operating at insufficient supply voltages.

The UVLO comparator monitors the output

voltage of the internal regulator, VCC. The

UVLO rising threshold is about 4.0V while its

falling threshold is 3.2V.

Power Good Indicator

MPQ28261 uses the open drain of an NMOS

rises above 90% of the reference voltage, PG

pin is pulled up to VCC by an external resistor