AM79C975VCW datasheet(51/304 Pages) AMD

51 / 304 page

Am79C973/Am79C975

P R E L I M INARY

Figure 16. Disconnect With Data Transfer

Disconnect Without Data Transfer

Figure 17 shows a target disconnect sequence during

which no data is transferred. STOP is asserted on clock

4 without TRDY being asserted at the same time. The

Am79C973/Am79C975 controller terminates the ac-

cess with the deassertion of FRAME on clock 5 and of

IRDY one clock cycle later. It finally releases the bus on

clock 7. The Am79C973/Am79C975 controller will

again request the bus after two clock cycles to retry the

last transfer. The starting address of the new transfer

will be the address of the last non-transferred data.

Target Abort

Figure 18 shows a target abort sequence. The target

asserts DEVSEL for one clock. It then deasserts

DEVSEL and asserts STOP on clock 4. A target can

use the target abort sequence to indicate that it can-

not service the data transfer and that it does not want

the transa ctio n to be retr ied. Ad ditio nally, the

Am79C973/Am79C975 controller cannot make any

assumption about the success of the previous data

transfers in the current transaction. The Am79C973/

Am79C975 controller terminates the current transfer

with the deassertion of FRAME on clock 5 and of

IRDY one clock cycle later. It finally releases the bus

on clock 6.

Since data integrity is not guaranteed, the Am79C973/

Am79C975 controller cannot recover from a target

abort event. The Am79C973/Am79C975 controller will

reset all CSR locations to their STOP_RESET values.

The BCR and PCI configuration registers will not be

cleared. Any on-going network transmission is termi-

nated in an orderly sequence. If less than 512 bits have

been transmitted onto the network, the transmission

will be terminated immediately, generating a runt

packet. If 512 bits or more have been transmitted, the

message will have the current FCS inverted and ap-

pended at the next byte boundary to guarantee an FCS

error is detected at the receiving station.

FRAME

CLK

IRDY

TRDY

C/BE

DEVSEL

REQ

GNT

PAR

DEVSEL

is sampled

ADDRi

0000

0111

PAR

0111

3456789

PAR

DATA

STOP

ADDRi+8

DATA

21510D-21

AM79C975VCW Datasheet(PDF) 51 Page - Advanced Micro Devices

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