| Electronic Components Datasheet Search |
|
ADS5287 Datasheet(PDF) 22 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
ADS5287 Datasheet(HTML) 22 Page - Texas Instruments |
|
22 / 42 page ![]() PHASE_DDR<1:0>= '00' PHASE_DDR<1:0>= '01' PHASE_DDR<1:0>= '10' PHASE_DDR<1:0>= '11' ADCLK P LCLK P OUT P ADCLK P LCLK P OUT P ADCLK P LCLK P OUT P ADCLK P LCLK P OUT P ADCLK P LCLK P OUT P ADS5287 SBAS428D – JANUARY 2008 – REVISED JUNE 2012 www.ti.com BIT CLOCK PROGRAMMABILITY The output interface of the ADS5287 is normally a DDR interface, with the LCLK rising edge and falling edge transitions in the middle of alternate data windows. Figure 1 shows this default phase. Figure 1. Default Phase of LCLK The phase of LCLK can be programmed relative to the output frame clock and data using bits PHASE_DDR<1:0>. The LCLK phase modes are shown in Figure 2. Figure 2. Phase Programmability Modes for LCLK 22 Copyright © 2008–2012, Texas Instruments Incorporated |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |