APR6016 datasheet(2/24 Pages) APLUS

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Preliminary

APR6016 Data Sheet

Page 2

Voice Recording & Playback Device

Revision 1.0

Functional Description

The EXTCLK pin allows the use of an external sampling

clock. This input can accept a wide range of frequencies

depending on the divider ratio programmed into the divider

that follows the clock. Alternatively, the programmable inter-

nal oscillator can be used to supply the sampling clock. The

Mux following both signals automatically selects the EXTCLK

signal if a clock is present, otherwise the internal oscillator

source is chosen. Detailed information on how to program the

divider and internal oscillator can be found in the explanation

of the PWRUP command, which appears in the OpCode

Command Description section. Guidance on how to choose

the appropriate sample clock frequency can be found in the

Sampling Rate & Voice Quality section.

The audio signal containing the content you wish to record

should be fed into the differential inputs ANAIN-, and

ANAIN+. After pre-amplification the signal is routed into the

anti-aliasing filter. The anti-aliasing filter automatically adapts

its response based on the sample rate being used. No exter-

nal anti-aliasing filter is therefore required.

After passing through the anti-alias filter, the signal is fed into

the sample and hold circuit which works in conjunction with

the Analog Write Circuit to store each analog sample in a

flash memory cell.

When a read operation is desired the Analog Read Circuit

extracts the analog data from the memory array and feeds

the signal to the Internal Low Pass Filter. The low pass filter

converts the individual samples into a continuous output. The

output signal then goes to the squelch control circuit and dif-

ferential output driver. The differential output driver feeds the

ANAOUT+ and ANAOUT- pins. Both differential output pins

swing around a 1.23V potential.

The squelch control circuit automatically reduces the output

signal by 6 dB during quiet passages. A copy of the squelch

control signal is present on the /SQLOUT pin to facilitate

reducing gain in the external amplifier as well. For more infor-

mation, refer to the Squelch section.

After passing through the squelch circuit the output signal

goes to the output amplifier. The output amplifier drives a sin-

gle ended output on the AUDOUT pin. The single ended out-

put swings around a 1.23V potential.

All SPI control and hand shaking signals are routed to the

Master Control Circuit. This circuit decodes all the SPI signals

and generates all the internal control signals. It also contains

the status register used for examining the current status of

the APR6016.

Figure 2

APR6016 Block Diagram

SAC

Low Pass

Amp

SCLK

/CS

/INT

/RESET

AUDOUT

/SQLOUT

Squelch

Amp

A NAOUT +

AN AOUT -

/BUSY

SQLCAP

Column Decoder

Column Address

Row

Address

Single Analog

Memory Cell

3.84 Mcell Memory Array

Write Circuit

Low Pass

Read Circuit

Analog input/output

to Memory array

Pre-

Amp

ANAIN+

ANAIN-

Programmable Internal

Oscillator

Mux

EXTCLK

Programmable

Divider

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