(35V ± 23V) x 60 ns

2 x 33 PH

= 11 mA

0.01

2

+ 0.06

13.8V

27.6V

x 1 -

13.8V

27.6V

= 345 mA

R3 =

0.95A x 195 m:

4 PA

= 46.3 k:

LM3401

SNVS516C – AUGUST 2007 – REVISED MAY 2013

www.ti.com

The next step is to select a PFET. The critical PFET parameters must meet the minimum circuit requirements of

35V input, 804 mA DC current, and adequate gate drive voltage rating.

Therefore, select a PFET with the following ratings:

•

•

•

1.8A continuous Id

•

Typically the PFET may be only sourcing 690 mA for about 50% duty cycle. However, at minimum input voltage

the duty cycle will increase close to 100%. Therefore, the PFET Id rating should be based on its continuous, not

pulsed, current capability.

Now the power dissipation should be verified. Assume the selected PFET has a gate capacitance of 200 pF,

which is within recommendation, and a gate charge of 15 nC. Maximum frequency and input voltage are used for

a worst case calculation:

0.125W) = 106°C

(34)

With the selected components, the maximum ambient temperature is above 100°C, sufficient for most

applications. Note that this limit applies to the IC only and depends on the pcb type and size. Lower ambient

temperature limits may apply to the PFET and other components.

Now the current limit threshold is set with R3 at 0.95A, which is 120% of the maximum peak current. The worst

(35)

time.

The next component is the input capacitor, C1. A low ESR ceramic capacitor must be used and properly located

on the PCB. For this design, the capacitor working voltage must be rated to at least 40V, and 50V is

recommended. A 2.2 µF input capacitor should be sufficient, assuming a good PCB layout. The worst case input

RMS current is calculated below 50% at duty cycle:

(36)

It must be verified that the selected input capacitor can tolerate this current. An additional bulk capacitor placed

at the input voltage connection is also recommended.

Next, select D1, the catch diode. A Schottky diode should be used. The reverse voltage rating must be greater

than 35V and the average forward current rating must be greater than:

(37)

This calculation assumes the minimum duty cycle, which is maximum input voltage and minimum anode voltage.

The diode must also be able to handle peak currents as high as the current limit threshold for short periods. We

select a 1A diode to ensure adequate capability over temperature.

If desired, a ripple reduction capacitor can be added at C2 to reduce the LED ripple current. A minimum starting

value of 100 nF is recommended for C2, and a value of 1 µF will work well in most applications. In case of an

open LED failure, the ripple reduction capacitor must be rated to the maximum input voltage of 35V. If C2 is

used, LED ripple current is reduced and the calculated maximum R2 value no longer applies as a limit.

Finally, check the accuracy. The static accuracy is calculated below using a 1% sense resistor.

(38)

To estimate line regulation, maximum input voltage and 60% duty cycle input voltage is used. For this example

60% duty cycle occurs at (13.6V + 0.2V)/0.60 or 23V input.

(39)

18

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