www.austriamicrosystems.com/LED-Driver-ICs/AS1130

Revision 1.07

14 - 38

AS1130

Datasheet - R e g i s t e r D e s c r i p t i o n

9 Register Description

Register Selection

Within this register the access to one of the RAM sections, the Dot Correction or to the Control register is selected. After one section is selected

this section is valid as long as an other section is selected.

Data Definition of the single frames

One frame consists of 2 datasets, the On/Off dataset and the Blink & PWM dataset. Where more On/Off frames can be linked to one PWM set.

Depending on the used PWM sets more or less On/Off frames can be stored inside the AS1130 (see Table 8).

Each On/Off Frame needs to define the used Blink & PWM dataset.

It’s necessary to define the RAM configuration before data can be written to the frame datasets. The RAM configuration is defined in the AS1130

config register (see Table 20 on page 25) via bit 2:0 and bit 4 for Dot Correction.

Note:

After a first write of data to the frames, the configuration is locked in the AS1130 config register and can be changed only after a reset

of the device. A change of the RAM configuration requires to re-write the frame datasets.

Table 7. Register Selection Address Map

Register Section

Address

Data

Description

HEX A7 A6 A5 A4 A3 A2 A1 A0 HEX D7 D6 D5 D4 D3 D2 D1 D0

NOP

0xFD

1

1

1

1

1

1

0

1

0x00

0

0

0

0

0

0

0

0

No operation

On/Off Frame 0

0x01

0

0

0

0

0

0

0

1

On/Off Information for

each Frame (up to 36

Frames)

On/Off Frame 1

0x02

0

0

0

0

0

0

1

0

On/Off Frame 2

0x03

0

0

0

0

0

0

1

1

....

.....

On/Off Frame 34

0x23

0

0

1

0

0

0

1

1

On/Off Frame 35

0x24

0

0

1

0

0

1

0

0

Blink & PWM Set 0

0x40

0

1

0

0

0

0

0

0

Blink & PWM

Information Sets (up to

6 sets)

Blink & PWM Set 1

0x41

0

1

0

0

0

0

0

1

Blink & PWM Set 2

0x42

0

1

0

0

0

0

1

0

Blink & PWM Set 3

0x43

0

1

0

0

0

0

1

1

Blink & PWM Set 4

0x44

0

1

0

0

0

1

0

0

Blink & PWM Set 5

0x45

0

1

0

0

0

1

0

1

Dot Correction

0x80

1

0

0

0

0

0

0

0

Selection of Dot

Correction Register

Control Register

0xC0

1

1

0

0

0

0

0

0

Selection of

Control Register

Table 8. RAM Configuration

RAM Configuration Blink & PWM Sets

On/Off Frames

On/Off Frames

with Dot Correction

1

1

36

35

2

2

30

29

3

3

24

23

4

4

18

17

5

5

12

11

6

6

6

5