OPA690 datasheet(24/45 Pages) TI

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OPA4830

325W

528W

78.7W

650W

+5V

845W

1.87kW

22 F

47 F

75W

VideoDAC

Load

AC-COUPLED OUTPUT VIDEO LINE DRIVER

-3

-6

-9

-12

-15

-18

-21

Frequency(Hz)

OPA4830

SBOS350A – DECEMBER 2006 – REVISED MAY 2008.................................................................................................................................................... www.ti.com

Figure 76. Video Line Driver with SAG Correction

output with a gain of approximately –20dB, so good

supply

decoupling

recommended

the

power-supply pin. Figure 77 shows the frequency

Low-power and low-cost video line drivers often

response for the circuit of Figure 76. This plot shows

buffer digital-to-analog converter (DAC) outputs with

the 8Hz low-frequency high-pass pole and a high-end

a gain of 2V/V into a doubly-terminated line. Those

cutoff at approximately 100MHz.

interfaces typically require a dc blocking capacitor.

For a simple solution, that interface often has used a

very large value blocking capacitor (220

µF) to limit

tilt, or SAG, across the frames. One approach to

creating a very low high-pass pole location using

much lower capacitor values is shown in Figure 76.

This circuit gives a voltage gain of 2 at the output pin

with a high-pass pole at 8Hz. Given the 150

Ω load, a

simple blocking capacitor approach would require a

133

µF value. The two much lower valued capacitors

give this same low-pass pole using this simple SAG

correction circuit of Figure 76.

The input is shifted slightly positive in Figure 76 using

the voltage divider from the positive supply. This

configuration gives about a 200mV input dc offset

that shows up at the output pin as a 400mV dc offset

when the DAC output is at zero current during the

Figure 77. Video Line Driver Response to Matched

sync tip portion of the video signal. This offset acts to

Load

hold the output in its linear operating region. This

circuit then passes on any power-supply noise to the

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