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AS3953 Datasheet(PDF) 30 Page - List of Unclassifed Manufacturers

Part # AS3953
Description  14443 High Speed Passive Tag Interface
PDF  42 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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AS3953 Datasheet(HTML) 30 Page - List of Unclassifed Manufacturers

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AS3953
Datasheet - A pp l ic a t io n I n f or m a t i on
8.3 Registers
The 6-bit register addresses below are defined in the hexadecimal notation. The possible address range is from 00h to 3Fh.
There are two types of registers implemented in the AS3953: configuration registers and display registers. The configuration registers are used
to configure the AS3953. They can be written and read through the SPI (RW). The display registers are read only (RO); they contain information
about the AS3953 internal state, which can be accessed through the SPI.
8.3.1 Overview of Registers
8.3.2 IO Definition Register
IO Configuration Register.
Note:
This register is directly supplied by VP_SPI. Its initial state is unknown.
Table 11. List of the SPI Interface Internal Registers
Address
[hex]
Content
Type
00
IO Configuration Register
RW
01
Mode Definition Register
RW
02
Bit Rate Definition Register
RW
04
RFID Status Display Register
RO
05
RATS Register
RO
08
Mask Main Interrupt Register
RW
09
Mask Auxiliary Interrupt Register
RW
0A
Main Interrupt Register
RO
0B
Auxiliary Interrupt Register
RO
0C
FIFO Status Register 1
RO
0D
FIFO Status Register 2
RO
10
Number of Transmitted Bytes Register 1
RW
11
Number of Transmitted Bytes Register 2
RW
Address# 00h : IO Configuration
Type: RW
Bit
Name
Default
Function
Comments
7
miso_pd2
x
1:
Pull-down on MISO, when \SS is low
and MISO is not driven by the AS3953
6
miso_pd1
x
1:
Pull-down on MISO when \SS is high
5
RFU
4
RFU
3
RFU
2
RFU
1
RFU
0
RFU



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