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OPA835IDBVT Datasheet(PDF) 32 Page - National Semiconductor (TI) |
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OPA835IDBVT Datasheet(HTML) 32 Page - National Semiconductor (TI) |
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32 / 53 page ![]() OPA 835 Signal and bias from previous stage Signal and bias to next stage 5 V R1 RG RF GVSIG 0 V 0 V VSIG VOUT RO RF OPA 835 Signal and bias from previous stage Signal and bias to next stage 5 V R1 RG 0 V VSIG RO VOUT GVSIG 0 V OPA835 OPA2835 SLOS713E – JANUARY 2011 – REVISED JULY 2013 www.ti.com Figure 67. Non-Inverting Single Supply with Pulse If the input signal pulses negative from ground, an inverting amplifier is more appropriate as shown in Figure 68. A key consideration in both non-inverting and inverting cases is that the input and output voltages are kept within the limits of the amplifier, and since the VICR of the OPA835 includes the negative supply rail, the op amp lends itself to this application. Figure 68. Inverting Single Supply with Pulse Power-Down Operation The OPA835 and OPA2835 include a power-down mode. Under logic control, the amplifiers can be switched from normal operation to a standby current of <1.5 µA. When the PD pin is connected high, the amplifier is active. Connecting PD pin low disables the amplifier, and places the output in a high impedance state. Note: the op amp’s output in gain of +1 is high impedance similar to a 3-state high impedance gate, but in other gains the feedback network is a parallel load. The PD pin must be actively driven high or low and should not be left floating. If the power-down mode is not used, PD should be tied to the positive supply rail. PD logic states are TTL with reference to the negative supply rail, VS-. When the op amp is powered from single supply and ground, driving from logic devices with similar VDD voltages to the op amp should not require any special consideration. When the op amp is powered from split supply, VS- is below ground and an open collector type of interface with pull-up resistor is more appropriate. Pull-up resistor values should be lower than 100k and the drive logic should be negated due to the inverting action of an open collector gate. 32 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated Product Folder Links: OPA835 OPA2835 |
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