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CS4812 Datasheet(PDF) 26 Page - Cirrus Logic

Part # CS4812
Description  Fixed Function Multi-Effects Audio Processor
PDF  36 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4812 Datasheet(HTML) 26 Page - Cirrus Logic

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CS4812
26
DS291PP3
abled, data bytes sent following the first data byte
will be written to successive registers following
that designated in the MAP.
During a read sequence, multiple bytes may be read
by continuing to clock in data bytes to the CS4812
after the first data byte and before initiating a stop
condition. If auto increment is disabled, the last
data byte read will be the register designated by the
MAP. If auto increment is enabled, data bytes read
following the first data byte will be read from suc-
cessive registers following that designated in the
MAP.
3.6
Boot Modes
There are two different techniques that allow the
system to load the application code into the
CS4812. The first technique is called, “AutoBoot”
and allows the application code to be loaded from
an external serial EEPROM with an I2C or SPI in-
terface. This technique is used in system applica-
tions that due not have a host. The second
technique is called, “Host Boot” and allows the ap-
plication code to be loaded directly from the host
microcontroller via I2C or SPI communication in-
terface. This method may eliminate the need for an
external EEPROM.
3.6.1
AutoBoot
The AutoBoot method simply requires an external
EEPROM with an I2C or SPI serial bus interface.
The DSP, automatically loads and runs the applica-
tion code resident in the EEPROM upon deasser-
tion of the RESET line. It should be noted that this
technique is used for systems that do not have a mi-
crocontroller and do not require real-time adjust-
ment of the application code parameters. Please
refer to Table 10 on page 6 for the timing require-
ments of the RESET line.
3.6.2
HostBoot
By using the HostBoot technique, an external mi-
crocontroller is required to download the applica-
Figure 25. I2C Slave Mode Read from DSP Core
Flow Diagram with DSP REQ
N
REQ LOW?
Y
SEND I2C START
WRITE ADDRESS BYTE
WITH R/W BIT = 0
GET ACK
READ DATABYTE
REQ STILL LOW?
N
Y
SEND ACK
SEND NACK
SEND I2C STOP
GET ACK
WRITE ADDRESS BYTE
WITH R/W BIT = 1
GET ACK
SEND I2C START
SEND MAP BYTE



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