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ICS810251I Data Sheet

VCXO AND SYNCHRONOUS ETHERNET JITTER ATTENUATOR

ICS810251AGI REVISION B OCTOBER 5, 2012

Table 3C. LVCMOS/LVTTL DC Characteristics, VDD = VDDO = 3.3V ± 5% or 2.5V ± 5%, TA = -40°C to 85°C

NOTE 1: Outputs terminated with 50

 to V

DDO/2. See Parameter Measurement Information section. Load Test Circuit diagrams.

AC Electrical Characteristics

Table 4A. AC Characteristics, VDD = VDDO = 3.3V ± 5%, TA = -40°C to 85°C

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. Device will meet specifications after thermal equilibrium has

been reached under these conditions.

NOTE: Characterized using a 616Hz bandwidth filter.

NOTE 1: This parameter is defined in accordance with JEDEC Standard 65.

NOTE 2: Please refer to the Phase Noise Plot.

NOTE 3: Specified with the VCXO-PLL free running high.

NOTE 4: Specified with the VCXO-PLL locked.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

VIH

Input

High Voltage

VDD = 3.465V

VDD + 0.3

VDD = 2.625V

1.7

VDD + 0.3

VIL

Input

Low Voltage

VDD = 3.465V

-0.3

0.8

VDD = 2.625V

-0.3

0.7

IIH

Input

High Current

CLK_IN

VDD = VIN = 3.465V or 2.625V

150

µA

OE, PLL_SEL

VDD = VIN = 3.465V or 2.625V

µA

IIL

Input

Low Current

CLK_IN

VDD = 3.465V or 2.625V, VIN = 0V

-5

µA

OE, PLL_SEL

VDD = 3.465V or 2.625V, VIN = 0V

-150

µA

VOH

Output High Voltage; NOTE 1

VDDO = 3.3V ± 5%

2.6

VDDO = 2.5V ± 5%

1.8

VOL

Output Low Voltage; NOTE 1

VDDO = 3.3V ± 5%

0.6

VDDO = 2.5V ± 5%

0.5

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

fREF

Input Reference Frequency

MHz

125

MHz

fVCO

VCXO-PLL Frequency

MHz

fOUT

Output Frequency

MHz

tJIT(CC)

Cycle-to-Cycle Jitter; NOTE 1

tjit(

)

RMS Phase Jitter (Random);

NOTE 2

fOUT = 25MHz, Integration Range:

1kHz – 1MHz

0.22

tJIT(PER)

Period jitter

5ps

tR / tF

Output Rise/Fall Time

20% to 80%

500

1200

odc

Output Duty Cycle; NOTE 3

odc

Output Duty Cycle; NOTE 4

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