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ACT5880 Datasheet(PDF) 7 Page - Active-Semi, Inc |
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ACT5880 Datasheet(HTML) 7 Page - Active-Semi, Inc |
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7 / 87 page ![]() ACT5880 Rev 2, 03-Sep-13 - 7 - www.active-semi.com ActivePMU TM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP. Copyright © 2013 Active-Semi, Inc. Active-Semi Confidential―Do Not Copy or Distribute PIN DESCRIPTIONS PIN NAME DESCRIPTION A1 SW3 The Switch Node of the Step-up DC/DC. Same function as pin A2. A2 SW3 The Switch Node of the Step-up DC/DC. Same function as pin A1. A3 FB3 The Current Feedback Input in constant current mode, or leave it unconnected in voltage regulation mode. Connect to current sense resistor in serial in the WLED string, sense the voltage to ground to regulate the WLED string current in constant current driver mode, or connect to the voltage sense tip in inverse regulator mode. These modes are factory programmable only. A4 nRSTO The Reset Output, OD and Active Low. Asserted low during power up and keep low for 260ms for system reset after OUT1 is in regulation. Refer to The Power-On Sequences section for more details . A5 CHGIN The Charger Input. Power input to the charger and the system, same function as pin B5 and pin C5. Bypass to GA with a 6.8μF high quality ceramic capacitor. A6 nIRQ The Interrupt Request Output, OD and Active Low. Asserted low when specified conditions qualified. De-asserted when reading the respective register bits or writing the respective register bits. A7 BATID The Battery Installed Detection. Connect to the ID pin of the battery house connector, to detect if a battery pack is installed by checking the voltage at this pin. Refer to The Battery Installed Detection section for more details. A8 nSTAT The Charger Status Output, OD with Internal 8mA Current Limit. Sink current when the charger is in precondition, fast charge and top-off states. It turns into high-Z in other charge states. A9 TH The Thermistor Monitoring Input. Monitor the battery pack temperature by reading the NTC thermistor in battery pack and only allow charging when the temperature is in a suitable temperature window. B1 GP3 The Ground Path of Step-up DC/DC. Provide the direct ground return path between internal switch, the external storage capacitor and the input decoupling capacitor. Same function as pin B2. Connect GA, GP1, GP2 and GP3 to a single point as close to the IC as possible. B2 GP3 The Ground Path of Step-up DC/DC. Same function as pin B1. B3 OUT3 The Step-up DC/DC Voltage Sense Node in the Voltage Regulation Mode, Over-Voltage Protection Sense Input in the Constant Current Mode. Connect to the Step-up DC/DC output in both modes. The modes are factory programmable only options. Bypass to GA with a 2.2μF high quality ceramic capacitor. B4 INL45 The Input Node for the LDO REG4 and REG5. Bypass to GA with a 1μF high quality ceramic capacitor placed as close to the IC as possible. B5 CHGIN The Charger Input. Same function as pin A5 and pin C5. B6 VBAT The Charger Output. Feed power to the battery and the system. Connect to the battery pack positive terminal, same function as pin B7 and pin C6.Bypass to GA with a 4.7μF high quality ceramic capacitor. B7 VBAT The Charger Output. Same function as pin B6 and pin C6. B8 ACIN The Adaptor Charging Input Detection. Pull this pin to a logic high when an adaptor is available or ground it otherwise. B9 CHGLEV The Charge Current Level Selection. A logic input to select charging current when the ACIN is pulled low, which is presumably for charging from the USB VBUS. Set high for 450mA charging and low for 90mA charging. The status of this pin does not affect the charging current during adaptor charging when the ACIN is pulled high. C1 HFPWR The Hand-Free Power Request Input. Pull this pin high to request system power on if this chip is not enabled, to initialize the normal power up procedure. When the IC is already enabled, logic changes at this pin asserts nIRQ to request for system host service. C2 PWRHLD The Power Hold Input. Pull this pin high to hold the IC to be in enable state. C3 INL89 The Input Node for the LDO REG8 and REG9. Bypass to GA with a 1μF high quality ceramic capacitor. |
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