Clock line should be short

and cross no other lines.

Single Ground entry for all

Reference

Components

All Analog Components

mounted over

Analog

area of Ground

Plane

Xfmr/Amplifier

Components

mounted over

Digital area of

Digital power line should be routed

away from analog power trace.

COMMON

GROUND

PLANE

Ground entry points

close to ground pins.

Analog power line should be routed

away from Digital power trace.

Driving

source

located close

to converter.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

V

D

DB5

DB4

DB3

DB2

DB1

DB0

OEB/DRDY

DR

GND

DA11

DA10

DA9

DA8

DA7

DA6

V

D

AGN

D

V

V

V

V

REF

AGN

D

V

A

AGN

D

REFSEL/DCS

V

V

V

ADC12DL080

All Digital

Ground

Plane

6 x 100:

6 x 100:

OSC

LATCH

LATCH

ADC12DL080

www.ti.com

SNAS345 – FEBRUARY 2006

Figure 7. Example of a Suitable Layout

Be especially careful with the layout of inductors. Mutual inductance can change the characteristics of the circuit

in which they are used. Inductors should not be placed side by side, even with just a small part of their bodies

beside each other.

The analog input should be isolated from noisy signal traces to avoid coupling of spurious signals into the input.

Any external component (e.g., a filter capacitor) connected between the converter's input pins and ground or to

the reference input pin and ground should be connected to a very clean point in the ground plane.

Copyright © 2006, Texas Instruments Incorporated

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