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ADC12DL080 Datasheet(PDF) 7 Page - Texas Instruments

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Part # ADC12DL080
Description  Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling
PDF  35 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC12DL080 Datasheet(HTML) 7 Page - Texas Instruments

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VA
AGND
To Internal Circuitry
I/O
conversions.
ADC12DL080
www.ti.com
SNAS345 – FEBRUARY 2006
Converter Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V, VDR =
+2.5V, PD = 0V, External VREF = +1.0V, fCLK = 80 MHz, fIN = 40 MHz, CL = 10 pF/pin, Duty Cycle Stabilizer On. Boldface
limits apply for TJ = TMIN to TMAX: all other limits TJ = 25°C
(1) (2) (3)
Typical
Limits
Units
Symbol
Parameter
Conditions
(4)
(4)
(Limits)
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes
12
Bits (min)
INL
Integral Non Linearity (5)
fIN = 0, Best Fit Method
±0.9
±3.5
LSB (max)
DNL
Differential Non Linearity
fIN = 0
±0.4
±1.0
LSB (max)
PGE
Positive Gain Error
±0.3
±3.5
%FS (max)
NGE
Negative Gain Error
±0.3
±3.5
%FS (max)
TC GE
Gain Error Tempco
−40°C ≤ TA ≤ +85°C
10
ppm/°C
+0.75
%FS (max)
VOFF
Offset Error (VIN+ = VIN−)
-0.2
-1.1
%FS (min)
TC VOFF
Offset Error Tempco
−40°C ≤ TA ≤ +85°C
16
ppm/°C
Under Range Output Code
0
0
Over Range Output Code
4095
4095
REFERENCE AND ANALOG INPUT CHARACTERISTICS
1.0
V (min)
VCM
Common Mode Input Voltage
1.5
2.0
V (max)
VRMA,
Reference Output Voltage
1.5
V
VRMB
(CLK LOW)
8
pF
CIN
VIN Input Capacitance (each pin to GND)
VIN = 1.5 Vdc ±0.5V
(CLK HIGH)
7
pF
0.8
V (min)
VREF
External Reference Voltage (6)
1.00
1.2
V (max)
Reference Input Resistance
1
M
Ω (min)
DYNAMIC CONVERTER CHARACTERISTICS
(1)
The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided
current is limited per (). However, errors in the A/D conversion can occur if the input goes above VA or below GND by more than 100
mV. As an example, if VA is +3.3V, the full-scale input voltage must be ≤+3.4V to ensure accurate
(2)
To guarantee accuracy, it is required that |VA–VD| ≤ 100 mV and separate bypass capacitors are used at each power supply pin.
(3)
With the test condition for VREF = +1.0V (2VP-P differential input), the 12-bit LSB is 488 µV.
(4)
Typical figures are at TJ = 25°C, and represent most likely parametric norms. Test limits are guaranteed to National's AOQL (Average
Outgoing Quality Level).
(5)
Integral Non Linearity is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through
positive and negative full-scale.
(6)
Optimum performance will be obtained by keeping the reference input in the 0.8V to 1.2V range. The LM4051CIM3-ADJ (SOT-23
package) is recommended for external reference applications.
Copyright © 2006, Texas Instruments Incorporated
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