ADS1113 datasheet(20/38 Pages) TI1

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ADS1113

ADS1114

ADS1115

SBAS444B – MAY 2009 – REVISED OCTOBER 2009

www.ti.com

Lo_thresh AND Hi_thresh REGISTERS

secondary

conversion

ready

function

the

comparator output pin can be realized by setting the

The upper and lower threshold values used by the

Hi_thresh register MSB to '1' and the Lo_thresh

comparator are stored in two 16-bit registers. These

registers store values in the same format that the

Hi_thresh register must be larger than the Lo_thresh

output register displays values; that is, they are

stored in twos complement format. Because it is

Table 10. When set to RDY mode, the ALERT/RDY

implemented

digital

comparator,

special

pin outputs the OS bit when in single-shot mode and

attention

should

taken

readjust

values

pulses when in continuous conversion mode.

whenever PGA settings are changed.

Table 10. Lo_thresh and Hi_thresh Registers

Lo_thresh (Read/Write)

BIT

NAME

Lo_thresh15

Lo_thresh14

Lo_thresh13

Lo_thresh12

Lo_thresh11

Lo_thresh10

Lo_thresh9

Lo_thresh8

blank

BIT

NAME

Lo_thresh7

Lo_thresh6

Lo_thresh5

Lo_thresh4

Lo_thresh3

Lo_thresh2

Lo_thresh1

Lo_thresh0

Hi_thresh (Read/Write)

BIT

NAME

Hi_thresh15

Hi_thresh14

Hi_thresh13

Hi_thresh12

Hi_thresh11

Hi_thresh10

Hi_thresh9

Hi_thresh8

blank

BIT

NAME

Hi_thresh7

Hi_thresh6

Hi_thresh5

Hi_thresh4

Hi_thresh3

Hi_thresh2

Hi_thresh1

Hi_thresh0

Lo_thresh default = 8000h.

Hi_thresh default = 7FFFh.

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