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ADS1113 Datasheet(PDF) 5 Page - Texas Instruments |
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ADS1113 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 38 page  SCL SDA t LOW t R t F t HDSTA t HDSTA t HDDAT t BUF t SUDAT t HIGH t SUSTA t SUSTO P S S P ADS1113 ADS1114 ADS1115 www.ti.com SBAS444B – MAY 2009 – REVISED OCTOBER 2009 TIMING REQUIREMENTS Figure 1. I2C Timing Diagram Table 1. I2C Timing Definitions FAST MODE HIGH-SPEED MODE PARAMETER MIN MAX MIN MAX UNIT SCL operating frequency fSCL 0.01 0.4 0.01 3.4 MHz Bus free time between START and STOP tBUF 600 160 ns condition Hold time after repeated START condition. tHDSTA 600 160 ns After this period, the first clock is generated. Repeated START condition setup time tSUSTA 600 160 ns Stop condition setup time tSUSTO 600 160 ns Data hold time tHDDAT 0 0 ns Data setup time tSUDAT 100 10 ns SCL clock low period tLOW 1300 160 ns SCL clock high period tHIGH 600 60 ns Clock/data fall time tF 300 160 ns Clock/data rise time tR 300 160 ns Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): ADS1113 ADS1114 ADS1115 |
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