LM5113

SNVS725E – JUNE 2011 – REVISED JANUARY 2012

www.ti.com

The LM5113 has an Under-voltage Lockout (UVLO) on both the VDD and bootstrap supplies. When the VDD

voltage is below the threshold voltage of 3.8V, both the HI and LI inputs are ignored, to prevent the GaN FETs

from being partially turned on. Also if there is sufficient VDD voltage, the UVLO will actively pull the LOL and

HOL low. When the HB to HS bootstrap voltage is below the UVLO threshold of 3.2V, only HOL is pulled low.

Both UVLO threshold voltages have 200mV of hysteresis to avoid chattering.

Bypass Capacitor

The VDD bypass capacitor provides the gate charge for the low-side and high-side transistors and to absorb the

reverse recovery charge of the bootstrap diode. The required bypass capacitance can be calculated as follows:

(1)

charge of the bootstrap diode, which is typically around 4nC.

ΔV is the maximum allowable voltage drop across

the bypass capacitor. A 0.1uF or larger value, good quality, ceramic capacitor is recommended. The bypass

capacitor should be placed as close to the pins of the IC as possible to minimize the parasitic inductance.

Bootstrap Capacitor

The bootstrap capacitor provides the gate charge for the high-side switch, dc bias power for HB under-voltage

lockout circuit, and the reverse recovery charge of the bootstrap diode. The required bypass capacitance can be

calculated as follows:

(2)

A good quality, ceramic capacitor should be used for the bootstrap capacitor. It is recommended to place the

bootstrap capacitor as close to the HB and HS pins as possible.

Power Dissipation

The power consumption of the driver is an important measure that determines the maximum achievable

operating frequency of the driver. It should be kept below the maximum power dissipation limit of the package at

the operating temperature. The total power dissipation of the LM5113 is the sum of the gate driver losses and the

bootstrap diode power loss.

The gate driver losses are incurred by charge and discharge of the capacitive load. It can be approximated as

(3)

the total input gate charge of the high-side and the low-side transistors as

12

Submit Documentation Feedback

Copyright © 2011–2012, Texas Instruments Incorporated

Product Folder Links: LM5113