LM3370 datasheet(6/33 Pages) TI1

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LM3370

SNVS406M – NOVEMBER 2005 – REVISED AUGUST 2011

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OPERATING RATINGS

(1) (2)

Input Voltage Range ((3))

2.7V to 5.5V

Recommended Load Current Per Channel

0 mA to 600 mA

Junction Temperature (TJ) Range

−30°C to +125°C

Ambient Temperature (TA) Range

(4)

−30°C to +85°C

(1)

Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which

operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits

and associated test conditions, see the Electrical Characteristics tables.

(2)

All voltages are with respect to the potential at the GND pin.

(3)

Input voltage range for all voltage options is 2.7V to 5.5V. The voltage range recommended for the specified output voltages: VIN = 2.7V

to 5.5V for 1V

≤ VOUT ≤ 1.7V and for VOUT = 1.8V or greater, VIN = VOUT + 1VorVIN,MIN = ILOAD * (RDSON_PFET + RDCR_INDUCTOR) + VOUT

(4)

In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may

have to be de-rated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =

125ºC), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to-ambient thermal resistance of the

part/package in the application (

θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).

THERMAL PROPERTIES

(5)

Junction-to-Ambient Thermal Resistance

θJA (LLP-16)

26°C/W

θJA (20-Bump micro SMD)

50°C/W

(5)

Junction-to-ambient thermal resistance (

θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set

forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2 x 1 array

of thermal vias. Thickness of copper layers are 2/1/1/2oz. Junction-to-ambient thermal resistance is highly application and board-layout

dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in

board design.The value of

θJA of this product can vary significantly, depending on PCB material, layout, and environmental conditions. In

applications where high maximum power dissipation exists (high VIN, high IOUT), special care must be paid to thermal dissipation issues.

For more information on these topics, please refer to Application Note 1187: Leadless Leadframe Package (LLP) and the Power

Efficiency and Power Dissipation section of this datasheet.

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