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WM1811A Datasheet(PDF) 141 Page - Wolfson Microelectronics plc |
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WM1811A Datasheet(HTML) 141 Page - Wolfson Microelectronics plc |
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141 / 328 page ![]() Production Data WM1811A w PD, November 2013, Rev 4.1 141 The register fields that control the GPIO pins are described inTable 79. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1792 (0700h) GPIO1 R1799 (0707h) GPIO8 to R1802 (070Ah) GPIO11 15 GPn_DIR 1 GPIOn Pin Direction 0 = Output 1 = Input 14 GPn_PU 0 GPIOnPull-Up Enable 0 = Disabled 1 = Enabled 13 GPn_PD 1 GPIOn Pull-Down Enable 0 = Disabled 1 = Enabled 10 GPn_POL 0 GPIOn Polarity Select 0 = Non-inverted (Active High) 1 = Inverted (Active Low) 9 GPn_OP_CFG 0 GPIOn Output Configuration 0 = CMOS 1 = Open Drain 8 GPn_DB 1 GPIOn Input De-bounce 0 = Disabled 1 = Enabled 6 GPn_LVL 0 GPIOn level. Write to this bit to set a GPIO output. Read from this bit to read GPIO input level. For output functions only, when GPn_POL is set, the register contains the opposite logic level to the external pin. 4:0 GPn_FN [4:0] GPIOn Pin Function (see Table 80 for details) GP1_FN default = 0000 GP8_FN default = 0001 GP9_FN default = 0001 GP10_FN default = 0001 GP11_FN default = 0001 Note:n is a number (1, 8, 9, 10, 11) that identifies the individual GPIO. Table 79 GPIO1, GPIO8, GPIO9, GPIO10 to GPIO11 Control GPIO FUNCTION SELECT The available GPIO functions are described in Table 80. The function of each GPIO is set using the GPn_FN register, where n identifies the GPIO pin (1, 8, 9, 10, 11). Note that the respective GPn_DIR must also be set according to whether the function is an input or output. GPn_FN DESCRIPTION COMMENTS 00h GPIO1 - ADCLRCLK1 GPIO8 - DACDAT3 GPIO9 - ADCDAT3 GPIO10 - LRCLK3 GPIO11 - BCLK3 Alternate Audio Interface connections. 01h Button detect input / Logic level output GPn_DIR = 0: GPIO pin logic level is set by GPn_LVL. GPn_DIR = 1: Button detect or logic level input. 02h Reserved |
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