WM1811A datasheet(165/328 Pages) WOLFSON

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Production Data

WM1811A

PD, November 2013, Rev 4.1

165

AIF1 - MONO MODE

AIF1 can be configured to operate in mono DSP mode by setting AIF1_MONO = 1 as described in

Table 89. Note that mono mode is only supported in DSP mode, ie when AIF1_FMT = 11.

In mono mode, the Left channel data or the Right channel data may be selected for output on

ADCDAT1. The selected channel is determined by the AIF1ADC1L_ENA and AIF1ADC1R_ENA bits.

(If both bits are set, then the Right channel data is selected.)

In mono mode, the DACDAT1 input can be enabled on the Left and/or Right signal paths using the

AIF1DAC1L_ENA and AIF1DAC1R_ENA bits. The mono input can be enabled on both paths at the

same time if required.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R769 (0301h)

AIF1 Control

(2)

AIF1_MONO

AIF1 DSP Mono Mode

0 = Disabled

1 = Enabled

Note that Mono Mode is only supported when

AIF1_FMT = 11.

Table 89 AIF1 Mono Mode Control

AIF1 - COMPANDING

The WM1811A supports A-law and

-law companding on both transmit (ADC) and receive (DAC)

sides of AIF1. This is configured using the register bits described inTable 90.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R769 (0301h)

AIF1 Control

(2)

AIF1DAC_C

OMP

AIF1 Receive Companding Enable

0 = Disabled

1 = Enabled

AIF1DAC_C

OMPMODE

AIF1 Receive Companding Type

0 = µ-law

1 = A-law

AIF1ADC_C

OMP

AIF1 Transmit Companding Enable

0 = Disabled

1 = Enabled

AIF1ADC_C

OMPMODE

AIF1 Transmit Companding Type

0 = µ-law

1 = A-law

Table 90 AIF1 Companding

Companding involves using a piecewise linear approximation of the following equations (as set out by

ITU-T G.711 standard) for data compression:

-law (where =255 for the U.S. and Japan):

F(x) = ln( 1 +

|x|) / ln( 1 + )

} for -1 ≤ x ≤ 1

A-law (where A=87.6 for Europe):

F(x) = A|x| / ( 1 + lnA)

 for x ≤ 1/A

F(x) = ( 1 + lnA|x|) / (1 + lnA)

 for 1/A ≤ x ≤ 1

The companded data is also inverted as recommended by the G.711 standard (all 8 bits are inverted

for

-law, all even data bits are inverted for A-law). The data will be transmitted as the first 8 MSBs of

data.

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