WM1811A datasheet(166/328 Pages) WOLFSON

166 / 328 page

WM1811A

Production Data

PD, November 2013, Rev 4.1

166

Companding converts 13 bits (

-law) or 12 bits (A-law) to 8 bits using non-linear quantization. This

provides greater precision for low amplitude signals than for high amplitude signals, resulting in a

greater usable dynamic range than 8 bit linear quantization. The companded signal is an 8-bit word

comprising sign (1 bit), exponent (3 bits) and mantissa (4 bits).

AIF1 8-bit mode is selected whenever AIF1DAC_COMP=1 or AIF1ADC_COMP=1. The use of 8-bit

data allows samples to be passed using as few as 8 BCLK1 cycles per LRCLK1 frame. When using

DSP mode B, 8-bit data words may be transferred consecutively every 8 BCLK1 cycles.

AIF1 8-bit mode (without Companding) may be enabled by setting AIF1DAC_COMPMODE=1 or

AIF1ADC_COMPMODE=1, when AIF1DAC_COMP=0 and AIF1ADC_COMP=0.

BIT7

BIT[6:4]

BIT[3:0]

SIGN

EXPONENT

MANTISSA

Table 91 8-bit Companded Word Composition

u-law Companding

100

120

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

Normalised Input

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

Figure 63 µ-Law Companding

A-law Companding

100

120

0.2

0.4

0.6

0.8

Normalised Input

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

Figure 64 A-Law Companding

WM1811A Datasheet(PDF) 166 Page - Wolfson Microelectronics plc

WM1811A Datasheet(HTML) 166 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL