WM1811A datasheet(208/328 Pages) WOLFSON

208 / 328 page

WM1811A

Production Data

PD, November 2013, Rev 4.1

208

REFERENCE VOLTAGES AND MASTER BIAS

This section describes the analogue reference voltage and bias current controls. It also describes the

VMID soft-start circuit for pop suppressed start-up and shut-down.

The analogue circuits in the WM1811A require a mid-rail analogue reference voltage, VMID. This

reference is generated from AVDD1 via a programmable resistor chain. Together with the external

VMID decoupling capacitor, the programmable resistor chain determines the charging characteristic

on VMID. This is controlled by VMID_SEL[1:0], and can be used to optimise the reference for normal

operation or low power standby as described in Table 128.

A buffered mid-rail reference voltage is provided. This is required for the single-ended configuration of

the Input PGAs, and also for direct signal paths from the input pins to the Input Mixers, Output Mixers

or Speaker Mixers. These requirements are noted in the relevant “Analogue Input Signal Path” and

“Analogue Output Signal Path” sections. The buffered mid-rail reference is enabled by setting the

VMID_BUF_ENA register bit.

The analogue circuits in the WM1811A require a bias current. The normal bias current is enabled by

setting BIAS_ENA. Note that the normal bias current source requires VMID to be enabled also.

ADDRESS

BIT

LABEL

DEFAUL

DESCRIPTION

R1 (0001h)

Power

Management

(1)

2:1

VMID_SEL

[1:0]

VMID Divider Enable and Select

00 = VMID disabled (for OFF mode)

01 = 2 x 40k

 divider (for normal operation)

10 = 2 x 240k

 divider (for low power standby)

11 = Reserved

BIAS_ENA

Enables the Normal bias current generator (for

all analogue functions)

0 = Disabled

1 = Enabled

R57 (0039h)

AntiPOP (2)

VMID_BUF_

ENA

VMID Buffer Enable

0 = Disabled

1 = Enabled (provided VMID_SEL > 00)

Table 128 Reference Voltages and Master Bias Enable

A pop-suppressed start-up requires VMID to be enabled smoothly, without the step change normally

associated with the initial stage of the VMID capacitor charging. A pop-suppressed start-up also

requires the analogue bias current to be enabled throughout the signal path prior to the VMID

reference voltage being applied. The WM1811A incorporates pop-suppression circuits which address

these requirements.

An alternate bias current source (Start-Up Bias) is provided for pop-free start-up; this is enabled by the

STARTUP_BIAS_ENA register bit. The start-up bias is selected (in place of the normal bias) using the

BIAS_SRC bit. It is recommended that the start-up bias is used during start-up, before switching back

to the higher quality, normal bias.

A soft-start circuit is provided in order to control the switch-on of the VMID reference. The soft-start

control circuit offers two slew rates for enabling the VMID reference; these are selected and enabled

by VMID_RAMP. When the soft-start circuit is enabled prior to enabling VMID_SEL, the reference

voltage rises smoothly, without the step change that would otherwise occur. It is recommended that

the soft-start circuit and the output signal path be enabled before VMID is enabled by VMID_SEL.

A soft shut-down is provided, using the soft-start control circuit and the start-up bias current generator.

The soft shut-down of VMID is achieved by setting VMID_RAMP, STARTUP_BIAS_ENA and

BIAS_SRC to select the start-up bias current and soft-start circuit prior to setting VMID_SEL=00.

Note that, if the VMID_RAMP function is enabled for soft start-up or soft shut-down then, after setting

VMID_SEL = 00 to disable VMID, the soft-start circuit must be reset before re-enabling VMID. The

soft-start circuit is reset by setting VMID_RAMP = 00. After resetting the soft-start circuit, the

VMID_RAMP register may be updated to the required setting for the next VMID transition.

The VMID soft-start register controls are defined in Table 129.

WM1811A Datasheet(PDF) 208 Page - Wolfson Microelectronics plc

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