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WM1811A Datasheet(PDF) 253 Page - Wolfson Microelectronics plc |
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WM1811A Datasheet(HTML) 253 Page - Wolfson Microelectronics plc |
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253 / 328 page ![]() Production Data WM1811A w PD, November 2013, Rev 4.1 253 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R89 (59h) DC Servo (4) 15:8 DCS_DAC_WR_ VAL_1 [7:0] 0000_0000 Writing to this field sets the DC Offset value for HPOUT1R in DAC Write DC Servo mode. Reading this field gives the current DC Offset value for HPOUT1R. Two’s complement format. LSB is 0.25mV. Range is -32mV to +31.75mV 7:0 DCS_DAC_WR_ VAL_0 [7:0] 0000_0000 Writing to this field sets the DC Offset value for HPOUT1L in DAC Write DC Servo mode. Reading this field gives the current DC Offset value for HPOUT1L. Two’s complement format. LSB is 0.25mV. Range is -32mV to +31.75mV Register 59h DC Servo (4) REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R96 (60h) Analogue HP (1) 8 HPOUT1_ATTN 0 HPOUT1L and HPOUT1R Attenuation 0 = 0dB 1 = -3dB Note that, when CP_DYN_PWR=0, then any update to HPOUT1_ATTN is not fully implemented until a ‘1’ is written to HPOUT1_VU. 7 HPOUT1L_RMV_ SHORT 0 Removes HPOUT1L short 0 = HPOUT1L short enabled 1 = HPOUT1L short removed For normal operation, this bit should be set as the final step of the HPOUT1L Enable sequence. 6 HPOUT1L_OUTP 0 Enables HPOUT1L output stage 0 = Disabled 1 = Enabled For normal operation, this bit should be set to 1 after the DC offset cancellation has been scheduled. 5 HPOUT1L_DLY 0 Enables HPOUT1L intermediate stage 0 = Disabled 1 = Enabled For normal operation, this bit should be set to 1 after the output signal path has been configured, and before DC offset cancellation is scheduled. This bit should be set with at least 20us delay after HPOUT1L_ENA. 3 HPOUT1R_RMV_ SHORT 0 Removes HPOUT1R short 0 = HPOUT1R short enabled 1 = HPOUT1R short removed For normal operation, this bit should be set as the final step of the HPOUT1R Enable sequence. 2 HPOUT1R_OUTP 0 Enables HPOUT1R output stage 0 = Disabled 1 = Enabled For normal operation, this bit should be set to 1 after the DC offset cancellation has been scheduled. |
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