AT90PWM216 datasheet(41/344 Pages) ATMEL

41 / 344 page

AT90PWM216/316 [DATASHEET]

7710H–AVR–07/2013

Notes:

1. Values are guidelines only.

2. The Power-on Reset will not work unless the supply voltage has been below VPOT (falling).

8.3

Power-on Reset

A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level is defined in Table

8-1. The POR is activated whenever V

CC is below the detection level. The POR circuit can be used to trigger the

start-up Reset, as well as to detect a failure in supply voltage.

A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the Power-on Reset

threshold voltage invokes the delay counter, which determines how long the device is kept in RESET after V

CC rise.

The RESET signal is activated again, without any delay, when V

CC decreases below the detection level.

Figure 8-2.

MCU Start-up, RESET Tied to V

Figure 8-3.

MCU Start-up, RESET Extended Externally

Table 8-1.

Reset Characteristics(1)

Symbol

Parameter

Condition

Min.

Typ.

Max.

Units

VPOT

Power-on Reset Threshold Voltage (rising)

1.4

2.3

Power-on Reset Threshold Voltage (falling)(2)

1.3

2.3

VRST

RESET Pin Threshold Voltage

0.2Vcc

0.85Vcc

tRST

Minimum pulse width on RESET Pin

400

VPOR

VCC start voltage to ensure internal Power-on RESET signal

-0.05

GND

+0.05

CCRR

CC Rise Rate to ensure internal Power-on RESET signal

0.3

V/ms

RESET

TIME-OUT

INTERNAL

RESET

TOUT

POT

RST

RESET

TIME-OUT

INTERNAL

RESET

TOUT

POT

RST

VCC

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