AT90PWM216 datasheet(52/344 Pages) ATMEL

52 / 344 page

AT90PWM216/316 [DATASHEET]

7710H–AVR–07/2013

Notes:

1. When the BOOTRST Fuse is programmed, the device will jump to the Boot Loader address at reset, see “Boot

Loader Support – Read-While-Write Self-Programming” on page 251.

2. When the IVSEL bit in MCUCR is set, Interrupt Vectors will be moved to the start of the Boot Flash Section. The

address of each Interrupt Vector will then be the address in this table added to the start address of the Boot Flash

Section.

Table 9-2 shows reset and Interrupt Vectors placement for the various combinations of BOOTRST and IVSEL set-

tings. If the program never enables an interrupt source, the Interrupt Vectors are not used, and regular program

code can be placed at these locations. This is also the case if the Reset Vector is in the Application section while

the Interrupt Vectors are in the Boot section or vice versa.

Note:

1. The Boot Reset Address is shown in Table 23-6 on page 263. For the BOOTRST Fuse “1” means unprogrammed

while “0” means programmed.

The most typical and general program setup for the Reset and Interrupt Vector Addresses in AT90PWM216/316 is:

Address

Labels Code

Comments

0x000

rjmp

RESET

; Reset Handler

0x002

rjmp

PSC2_CAPT

; PSC2 Capture event Handler

0x004

rjmp

PSC2_EC

; PSC2 End Cycle Handler

0x006

rjmp

PSC1_CAPT

; PSC1 Capture event Handler

0x008

rjmp

PSC1_EC

; PSC1 End Cycle Handler

0x00A

rjmp

PSC0_CAPT

; PSC0 Capture event Handler

0x00C

rjmp

PSC0_EC

; PSC0 End Cycle Handler

0x00E

rjmp

ANA_COMP_0

; Analog Comparator 0 Handler

0x010

rjmp

ANA_COMP_1

; Analog Comparator 1 Handler

0x012

rjmp

ANA_COMP_2

; Analog Comparator 2 Handler

0x014

rjmp

EXT_INT0

; IRQ0 Handler

0x016

rjmp

TIM1_CAPT

; Timer1 Capture Handler

0x01A

rjmp

TIM1_COMPA

; Timer1 Compare A Handler

0x01C

rjmp

TIM1_COMPB

; Timer1 Compare B Handler

0x01E

rjmp

TIM1_OVF

; Timer1 Overflow Handler

0x020

rjmp

TIM0_COMPA

; Timer0 Compare A Handler

0x022

rjmp

TIM0_OVF

; Timer0 Overflow Handler

0x024

rjmp

ADC

; ADC Conversion Complete Handler

0x026

rjmp

EXT_INT1

; IRQ1 Handler

0x003A

0x003C

0x003E

SPM READY

Store Program Memory Ready

Table 9-2.

Reset and Interrupt Vectors Placement in AT90PWM216/316(1)

BOOTRST

IVSEL

Reset Address

Interrupt Vectors Start Address

0x000

0x001

0x000

Boot Reset Address + 0x001

Boot Reset Address

0x001

Boot Reset Address

Boot Reset Address + 0x001

Table 9-1.

Reset and Interrupt Vectors

Vector

No.

Program

Address

Source

Interrupt Definition

AT90PWM216 Datasheet(PDF) 52 Page - ATMEL Corporation

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