GMS81032 datasheet(85/101 Pages) HYNIX

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CHAPTER 7. RESET FUNCTION

7.1 EXTERNAL RESET

The RESET pin should be held at low for at least 2machine cycles with the power supply

voltage within the operating voltage range and must be connected 0.1uF capacitor

for stable system initialization.

The RESET pin contains a Schmitt trigger with an internal pull-up resistor.

0.1uF capacitor

Fig 7.0 RESET Pin connection.

7.2 POWER ON RESET

Power On Reset circuit automatically detects the rise of power voltage (the rising time

should be within 50ms) the power voltage reaches a certain level, RESET terminal is

maintained at ¡ÈL¡È Level until a crystal ceramic oscillator oscillates stably. After power

applies and starting of oscillation, this reset state is maintained for about oscillation cycle of

219 (about 65.5ms : at 4MHz).

The execution of built-in Power On Reset circuit is as follows :

(1) Latch the pulse from Power On Detection Pulse Generator circuit, and reset

Prescaler, B.I.T and B.I.T Overflow detection circuit.

(2) Once B.I.T Overflow detection circuit is reset. Then, Prescaler starts to count.

(3) Prescaler output is inputted into B.I.T and PS10 of Prescaler output is automatically

selected. If overflow of B.I.T is detected, Overflow detection circuit is set.

(4) Reset circuit generates maximum period of reset pulse from Prescaler and B.I.T.

Chapter7. Reset Function

RESET

GMS81032 Datasheet(PDF) 85 Page - Hynix Semiconductor