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GMS81032 Datasheet(PDF) 27 Page - Hynix Semiconductor |
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GMS81032 Datasheet(HTML) 27 Page - Hynix Semiconductor |
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27 / 101 page  2 - 4 2.1.4.5 PUSH A(X, Y, PSW) M(SP) ¡ç A SP ¡ç SP - 1 2.1.4.6 POP A(X, Y, PSW) SP ¡ç SP + 1 A ¡ç M(SP) 2.1.5 PC (Program Counter) - Program counter is a 16-bit counter consisted of 8-bit register PCH and PCL. - Addressing space is 64K bytes. 2.1.6 PSW (Program Status Word) - PSW is an 8-bit register. - Consisted of the flags showing the post state of operation and the flags determining the CPU operation, initialized as 00H in reset state. 2.1.7 Flag register. 2.1.7.1 Carry flag (C) - After operation, set when there is a carry from bit7 of ALU or there is not a borrow. - Set by SETC and clear by CLRC. - Executable as 1-bit accumulator. - Branch condition flag of BCS, BCC. 2.1.7.2 Zero flag (Z) - After operation also including 16-bit operatiion, set if the result is ¡È0¡È - Branch condition flag of BEQ, BNE. 2.1.7.3 Interrupt enable flag (I) - Master enable flag of interrupt except for RST (reset). - Set and cleared by EI, DI Chapter 2. Function Description |
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