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GMS81032 Datasheet(PDF) 74 Page - Hynix Semiconductor |
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GMS81032 Datasheet(HTML) 74 Page - Hynix Semiconductor |
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74 / 101 page ![]() 5 - 9 5.7 Key Scan Input Processing Key Scan Interrupt is generated by detecting low Input from each Input pin (R0, R1) or standby(SLEEP, STOP) release signal. Key Scan ports are all 16bit which are controlled by Stand-by Mode Release Register (SMRR0, SMRR1). Key Input is considered as Interrupt, therefore, KSCNE bit of IEHN should be set for correct interrupt executing, SLEEP mode and STOP mode, the rest of executing is the same as that of external Interrupt. Each SMRR Register bit is allowed for each port(for Bit=0, no Key Input, for Bit=1, Key Input available). At reset, SMRR becomes ¡È00H¡È. So, there is no Key Input source. R00 R01 . . R07 R10 R11 . . R17 R0 port Selection Logic R1 port Selection Logic SMRR0 W <00DCH> W <00DDH> SMRR1 7 0 7 0 <Key Scan Block> Chapter 5. Interrupt Internal Key Scan Interrupt |
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