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ICS1893 Datasheet(PDF) 128 Page - Integrated Circuit Systems

Part # ICS1893
Description  3.3-V 10Base-T/100Base-TX Integrated PHYceiver?
PDF  152 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS1893 Datasheet(HTML) 128 Page - Integrated Circuit Systems

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ICS1893 Rev C 6/6/00
June, 2000
128
Chapter 10
DC and AC Operating Conditions
ICS1893 Data Sheet - Release
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
10.5.2
Timing for Transmit Clock (TXCLK) Pins
Table 10-9 lists the significant time periods for signals on the Transmit Clock (TXCLK) pins for the various
interfaces. Figure 10-3 shows the timing diagram for the time periods.
Figure 10-3.
Transmit Clock Timing Diagram
Table 10-9.
Transmit Clock Timing
Time
Period
Parameter
Conditions
Min.
Typ.
Max. Units
t1
TXCLK Duty Cycle
–
35
50
65
%
t2a
TXCLK Period
100M MII (100Base-TX)
–
40
–
ns
t2b
TXCLK Period
10M MII (10Base-T)
–
400
–
ns
t2c
TXCLK Period
100M Symbol Interface (100Base-TX)
–
40
–
ns
t2d
TXCLK Period
10M Serial Interface (10Base-T)
–
100
–
ns
t1
t2x
TXCLK



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