D844 datasheet(13/20 Pages) AD

13 / 20 page

AD844

Rev. F | Page 13 of 20

Table 3. Gain vs. Bandwidth

Gain

BW (MHz)

GBW (MHz)

−1

1 kΩ

−1

500 Ω

−2

2 kΩ

1 kΩ

−2

1 kΩ

500 Ω

−5

5 kΩ

1 kΩ

5.2

−5

500 Ω

100 Ω

245

−10

1 kΩ

100 Ω

230

−10

500 Ω

50 Ω

330

−20

1 kΩ

50 Ω

420

−100

5 kΩ

50 Ω

3.2

320

RESPONSE AS AN I-V CONVERTER

The AD844 works well as the active element in an operational

current-to-voltage converter, used in conjunction with an exter-

nal scaling resistor, R1, in Figure 30. This analysis includes the

stray capacitance, CS, of the current source, which may be a

high speed DAC. Using a conventional op amp, this capacitance

forms a nuisance pole with R1 that destabilizes the closed-loop

response of the system. Most op amps are internally compensated

for the fastest response at unity gain, so the pole due to R1 and

CS reduces the already narrow phase margin of the system. For

example, if R1 is 2.5 kΩ, a CS of 15 pF places this pole at a fre-

quency of about 4 MHz, well within the response range of even a

medium speed operational amplifier. In a current feedback amp,

this nuisance pole is no longer determined by R1 but by the

input resistance, RIN. Because this is about 50 Ω for the AD844,

the same 15 pF forms a pole at 212 MHz and causes little

trouble. It can be shown that the response of this system is:

()()

sig

OUT

where:

is a factor very close to unity and represents the finite dc gain

of the amplifier.

is the dominant pole.

is the nuisance pole.

Td = KR1Ct

Tn = RINCS (assuming RIN << R1)

Using typical values of R1 = 1 kΩ and Rt = 3 MΩ, K = 0.9997; in

other words, the gain error is only 0.03%. This is much less than

the scaling error of virtually all DACs and can be absorbed, if

necessary, by the trim needed in a precise system.

In the AD844, Rt is fairly stable with temperature and supply

voltages, and consequently the effect of finite gain is negligible

unless high value feedback resistors are used. Because that

results in slower response times than are possible, the relatively

low value of Rt in the AD844 is rarely a significant source of error.

VOUT

AD844

ISIG

Figure 30. Current-to-Voltage Converter

CIRCUIT DESCRIPTION OF THE AD844

A simplified schematic is shown in Figure 31. The AD844 differs

from a conventional op amp in that the signal inputs have

radically different impedance. The noninverting input (Pin 3)

presents the usual high impedance. The voltage on this input is

transferred to the inverting input (Pin 2) with a low offset voltage,

ensured by the close matching of like polarity transistors operating

under essentially identical bias conditions. Laser trimming nulls

the residual offset voltage, down to a few tens of microvolts. The

inverting input is the common emitter node of a complementary

pair of grounded base stages and behaves as a current summing

node. In an ideal current feedback op amp, the input resistance

is zero. In the AD844, it is about 50 Ω.

A current applied to the inverting input is transferred to a

complementary pair of unity-gain current mirrors that deliver

the same current to an internal node (Pin 5) at which the full

output voltage is generated. The unity-gain complementary

voltage follower then buffers this voltage and provides the load

driving power. This buffer is designed to drive low impedance

loads, such as terminated cables, and can deliver ±50 mA into a

50 Ω load while maintaining low distortion, even when operating

at supply voltages of only ±6 V. Current limiting (not shown)

ensures safe operation under short-circuited conditions.

+IN

OUTPUT

–IN

+VS

–VS

Figure 31. Simplified Schematic

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