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80960CF-33 Datasheet(PDF) 61 Page - Intel Corporation |
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80960CF-33 Datasheet(HTML) 61 Page - Intel Corporation |
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61 / 77 page ![]() PRELIMINARY 55 A 80960CF-40, -33, -25, -16 Figure 32. Burst, Non-Pipelined Read Request With Wait States, 16-Bit Bus ADS SUP, DMA, W/R BLAST DT/R DEN A3:2 WAIT D31:0 PCLK Byte Order Bus Width NWDD NWAD NXDA NRDD NRAD Pipe- Lining External Ready Control Burst 31-23 22 18-17 21 20-19 16-12 7-3 11-10 9-8 2 1 0 X x 0 0 1 01 16-bit 01 X xx X xxxxx 1 01 2 00010 OFF 0 Enabled 1 0 0..0 Disabled 0 A2 1 D 1 D 1 D 1 D 1 A Function Bit Value Valid A3:2 = 00 or 10 A3:2 = 01 or 11 D15:0 A1=0 D15:0 A1=1 D15:0 A1=0 D15:0 A1=1 D/C, LOCK, A31:4, BE3/BHE, BE1/A1 BE0/BLE F_CX033A |
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