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80960CF-33 Datasheet(PDF) 63 Page - Intel Corporation |
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80960CF-33 Datasheet(HTML) 63 Page - Intel Corporation |
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63 / 77 page ![]() PRELIMINARY 57 A 80960CF-40, -33, -25, -16 Figure 34. Non-Burst, Pipelined Read Request Without Wait States, 32-Bit Bus Non-pipelined request concludes pipelined reads begin. Pipelined reads conclude, non-pipelined requests begin. ADS A31:4, SUP, DMA, D/C, LOCK BLAST WAIT D31:0 PCLK Byte Order Bus Width NWDD NWAD NXDA NRDD NRAD Pipe- Lining External Ready Control Burst 31-23 22 18-17 21 20-19 16-12 7-3 11-10 9-8 2 1 0 X x 0 0 X xx X xx X xx X xxxxx X xx 0 00000 ON 1 Disabled 0 0 0..0 X x Function Bit Value IN D IN D' IN D'' IN D''' IN D'''' AA' D A'' D' A''' D'' A'''' D''' D'''' Valid Valid Valid Valid Valid Invalid Invalid DT/R DEN A3:2 BE3:0 Valid Valid Valid Valid Valid Invalid W/R F_CX035A |
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