80960SA datasheet(11/39 Pages) INTEL

11 / 39 page

80960SA

The 80960SA provides two hardware breakpoint

registers

on-chip

which,

using

special

command, can be set to any value. When the

instruction pointer matches either breakpoint register

value, the breakpoint handling routine is automati-

cally called.

The 80960SA also provides software breakpoints

through the use of two instructions: MARK and

FMARK. These can be placed at any point in a

program and cause the processor to halt execution

at that point and call the breakpoint handling routine.

The breakpoint mechanism is easy to use and

provides a powerful debugging tool.

Tracing is available for instructions (single step

execution), calls and returns and branching. Each

trace type may be enabled separately by a special

debug instruction. In each case, the 80960SA

executes the instruction first and then calls a trace

handling routine (usually part of a software debug

monitor). Further program execution is halted until

the routine completes, at which time execution

resumes at the next instruction. The 80960SA’s

tracing mechanisms, implemented completely in

hardware, greatly simplify the task of software test

and debug.

1.1.10 Fault Detection

The 80960SA has an automatic mechanism to

handle

faults.

Fault

types

include

trace

and

arithmetic faults. When the processor detects a fault,

it automatically calls the appropriate fault handling

routine and saves the current instruction pointer and

necessary

state

information

make

efficient

recovery possible. Like interrupt handling routines,

fault handling routines are usually written to meet the

needs of specific applications and are often included

as part of the operating system or kernel.

For each of the fault types, there are numerous

subtypes that provide specific information about a

fault. The fault handler can use this specific infor-

mation to respond correctly to the fault.

1.1.11 Built-in Testability

Upon reset, the 80960SA automatically conducts an

exhaustive internal test of its major blocks of logic.

Then, before executing its first instruction, it does a

zero check sum on the first eight words in memory to

ensure that the memory image was programmed

correctly. If a problem is discovered at any point

during the self-test, the 80960SA asserts its FAIL pin

and will not begin program execution. Self test takes

approximately 24,000 cycles to complete.

System manufacturers can use the 80960SA’s self-

test feature during incoming parts inspection. No

special diagnostic programs need to be written. The

test is both thorough and fast. The self-test capability

helps ensure that defective parts are discovered

before systems are shipped and, once in the field,

the self-test makes it easier to distinguish between

problems caused by processor failure and problems

resulting from other causes.

1.1.12 CHMOS

The 80960SA is fabricated using Intel’s CHMOS IV

(Complementary High Speed Metal Oxide Semicon-

ductor) process. The 80960SA is available at 10 and

16 MHz in the QFP package and at 10, 16 and 20

MHz in the PLCC package.

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