W78IRD2 datasheet(13/76 Pages) ETC2

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W78IRD2

Publication Release Date: October 2, 2006

- 13 -

Revision A7

Timer 1 MSB

Bit:

TH1.7

TH1.6

TH1.5

TH1.4

TH1.3

TH1.2

TH1.1

TH1.0

Mnemonic: TH1

Address: 8Dh

TH1.7-0: Timer 1 High byte

Auxiliary Register

Bit:

EXTRAM ALEOFF

Mnemonic: AUXR

Address: 8Eh

BIT

NAME

FUNCTION

7~2

Reserve

EXTRAM

0 = Enable AUX-RAM

1 = Disable AUX-RAM

ALEOFF

0: ALE expression is enabled.

1: ALE expression is disabled.

Port 1

Bit:

P1.7

P1.6

P1.5

P1.4

P1.3

P1.2

P1.1

P1.0

Mnemonic: P1

Address: 90h

P1.7-0: General-purpose input/output port. Port-read instructions read the port pins, while read-modify-

write instructions read the port latch.

Port 4.1 Low Address Comparator

Bit:

P41AL.7 P41AL.6 P41AL.5 P41AL.4 P41AL.3 P41AL.2 P41AL.1 P41AL.0

Mnemonic: P41AL

Address: 94h

Port 4.1 High Address Comparator

Bit:

P41AH.7 P41AH.6 P41AH.5 P41AH.4 P41AH.3 P41AH.2 P41AH.1 P41AH.0

Mnemonic: P41AH

Address: 95h

W78IRD2 Datasheet(PDF) 13 Page - List of Unclassifed Manufacturers

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