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CD4536BMS Datasheet(PDF) 4 Page - Intersil Corporation |
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CD4536BMS Datasheet(HTML) 4 Page - Intersil Corporation |
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4 / 13 page  7-1239 Specifications CD4536BMS Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA -55oC - -4.2 mA Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC, -55oC- 3 V Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC, -55oC+7 - V Propagation Delay Clock to Q1 8-Bypass High TPHL1 TPLH1 VDD = 10V 1, 2, 3 +25oC - 1000 ns VDD = 15V 1, 2, 3 +25oC - 700 ns Propagation Delay Clock to Q1 8-Bypass Low TPHL2 TPLH2 VDD = 10V 1, 2, 3 +25oC - 1600 ns VDD = 15V 1, 2, 3 +25oC - 1200 ns Propagation Delay Clock to Q16 TPHL3 TPLH3 VDD = 10V 1, 2, 3 +25oC - 3000 ns VDD = 15V 1, 2, 3 +25oC - 2000 ns Propagation Delay Qn to Qn+1 TPHL TPLH VDD = 5V 1, 2, 3 +25oC - 300 VDD = 10V 1, 2, 3 +25oC - 150 VDD = 15V 1, 2, 3 +25oC - 100 Propagation Delay Set to Qn TPLH VDD = 5V 1, 2, 3 +25oC - 600 VDD = 10V 1, 2, 3 +25oC - 250 VDD = 15V 1, 2, 3 +25oC - 160 Propagation Delay Reset to Qn TPHL4 VDD = 10V 1, 2, 3 +25oC - 2000 ns VDD = 15V 1, 2, 3 +25oC - 1500 ns Transition Time TTHL TTLH VDD = 10V 1, 2, 3 +25oC - 100 ns VDD = 15V 1, 2, 3 +25oC - 80 ns Maximum Clock Input Frequency. Unlimited In- put Rise or Fall Time FCL VDD = 10V 1, 2, 3 +25oC 1.5 - MHz VDD = 15V 1, 2, 3 +25oC 2.5 - MHz Minimum Clock Pulse Width TW VDD = 5V 1, 2, 3 +25oC - 400 ns VDD = 10V 1, 2, 3 +25oC - 150 ns VDD = 15V 1, 2, 3 +25oC - 100 ns Minimum Set Pulse Width TW VDD = 5V 1, 2, 3 +25oC - 400 ns VDD = 10V 1, 2, 3 +25oC - 200 ns VDD = 15V 1, 2, 3 +25oC - 120 ns Minimum Reset Pulse Width TW VDD = 5V 1, 2, 3 +25oC- 6 µs VDD = 10V 1, 2, 3 +25oC- 2 µs VDD = 15V 1, 2, 3 +25oC - 1.5 µs Minimum Set Recovery Time TREM VDD = 5V 1, 2, 3 +25oC- 5 µs VDD = 10V 1, 2, 3 +25oC- 2 µs VDD = 15V 1, 2, 3 +25oC - 1.6 µs Minimum Reset Recov- ery Time TREM VDD = 5V 1, 2, 3 +25oC- 7 µs VDD = 10V 1, 2, 3 +25oC- 3 µs VDD = 15V 1, 2, 3 +25oC- 2 µs Input Capacitance CIN Any Input 1, 2 +25oC - 7.5 pF NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE LIMITS UNITS MIN MAX |
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