26

#2

C

7

LONG

SKIP

TAKEN: RP + 1

→ RP

M(RP + 1)

RP + 1

0

1

0

S1#1

C

C

LONG

SKIP

NOT TAKEN: NO OPERATION

MRP

RP

0

1

0

S1#1

C

D

LONG

SKIP

NOT TAKEN: NO OPERATION

MRP

RP

0

1

0

#2

C

E

LONG

SKIP

NOT TAKEN: NO OPERATION

M(RP + 1)

RP + 1

0

1

0

S1#1

C

F

LONG

SKIP

NOT TAKEN: NO OPERATION

M(RP + 1)

RP + 1

0

1

0

S1#1

C

4

NOP

NO OPERATION

MRP

RP

0

1

0

#2

C

4

NOP

NO OPERATION

M(RP + 1)

RP + 1

0

1

0

S1

D

0-F

SEP

N

→ PNN

RN

1

1

0

S1

E

0-F

SEX

N

→ XNN

RN

1

1

0

S1

F

0

LDX

MRX

→ D

MRX

RX

0

1

0

S1

F

1

OR

MRX OR D

→ D

MRX

RX

0

1

0

S1

F

2

AND

MRX AND D

→ D

MRX

RX

0

1

0

S1

F

3

XOR

MRX XOR D

→ D

MRX

RX

0

1

0

S1

F

4

ADD

MRX + D

→ DF, D

MRX

RX

0

1

0

S1

F

5

SD

MRX - D

→ DF, D

MRX

RX

0

1

0

S1

F

7

SM

D - MRX

→ DF; D

MRX

RX

0

1

0

S1

F

6

SHR

LSB(D)

→ DF; 0 → MSB(D)

HIGH Z

RX

1

1

0

S1

F

8

LDI

MRP

→ D; RP + 1 → RP

MRP

RP

0

1

0

S1

F

9

ORI

MRP OR D

→ D; RP + 1 → RP

MRP

RP

0

1

0

S1

F

A

ANI

MRP AND D

→ D; RP + 1 → RP

MRP

RP

0

1

0

S1

F

B

XRI

MRP XOR D

→ D; RP + 1 → RP

MRP

RP

0

1

0

S1

F

C

ADI

MRP + D

→ DF, D; RP + 1 → RP

MRP

RP

0

1

0

S1

F

D

SDI

MRP - D

→ DF, D; RP + 1 → RP

MRP

RP

0

1

0

S1

F

F

SMI

D - MRP

→ DF, D; RP + 1 → RP

MRP

RP

0

1

0

S1

F

E

SHL

MSB(D)

→ DF; 0 → LSB(D)

HIGH Z

RP

1

1

0

S2

DMA IN

DMA IN

DMA IN

BUS

→ MR0; R0 + 1 → R0

DATA

FROM I/O

DEVICE

R0

1

0

0

S2

DMA OUT

DMA

OUT

DMA OUT

MRO

→ BUS; R0 + 1 → R0

MR0

R0

0

1

0

S3

INTER-

RUPT

INTER-

RUPT

INTERRUPT

X, P

→ T; 0 → MIE

1

→ P; 2 → X

HIGH Z

RN

1

1

0

THE FOLLOWING ARE ALL LINKED INSTRUCTIONS “68” PRECEEDS ALL OP CODES, SO THERE IS A DUPLICATE FETCH

S1

0

0

STPC

STOP COUNTER CLOCK;

0

→ ÷ 32 PRESCALER

HIGH Z

R0

1

1

0

S1

0

1

DTC

CNTR - 1

→ CNTR

HIGH Z

R1

1

1

0

TABLE 2. CONDITIONS ON DATA BUS AND MEMORY ADDRESS LINES DURING ALL MACHINE STATES (Continued)

STATE

I

N

MNEMONIC

OPERATION

DATA

BUS

MEMORY

ADDRESS

MRD

MWR

N

LINES

CDP1805AC, CDP1806AC