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AN4371 Datasheet(PDF) 11 Page - STMicroelectronics |
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AN4371 Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 29 page ![]() DocID025337 Rev 1 11/29 AN4371 ADC built-in self-test algorithms 28 Figure 3. Self-test execution sequence example C and RC in scan mode Figure 4. Self-test execution sequence flow example S in scan mode In the case there is required to schedule self-test channel execution in defined sequence the baud rate is implemented in ADC. This control defines the scheduling of test channel between the normal conversions. The scheduling rate is specified by STBRR[BR]. Figure 5. Self-test baud rate example C and RC By default, if test channel is enabled, one Step of selected algorithm is executed after every chain of normal conversion. STBRR[BR] field provides flexibility by scheduling the test channel conversion to be performed not at the end of every chain but at the end of BR+1 number of chains. Note: This feature is applicable only for scan mode of operation and not for one shot mode. The STBRR.BR should be set to zero for one shot mode. 2.2 Supply self-test – Algorithm S Algorithm S consists of 3 steps. Not allowed to be interleaved with normal conversion. At the end of chain of the normal conversions, (assuming default value of STCR3.ALG) all steps of Algorithm S are performed (as Algorithm S is always atomic). MSR.SELF_TEST_S is set. |
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