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AN3324 Datasheet(PDF) 17 Page - STMicroelectronics |
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AN3324 Datasheet(HTML) 17 Page - STMicroelectronics |
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17 / 37 page ![]() AN3324 Module software requirements for non applicative peripherals Doc ID 18311 Rev 2 17/37 Figure 6. Clock configuration flow(c) c. Flash and SRAM wait states depend on MCU work frequency. For this reason it’s a good choice to configure these together with clocks. Enable All Modes Enable All Perip. Clocks Select Clock sources for FMPLL Modules Begin Enable External Oscillators Setting RUN Conf. Register Transition Mode Set Output Clock Transition Mode Init PLL0 (Sys PLL) Enable PLLs Wait for PLLs Locking Transition Mode Configure Auxiliary Clock Selectors and Dividers Wait States Configuration for Flash and RAM Select System Clock derived off the Sys PLL Transition Mode End Init PLL1 |
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