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AN3324 Datasheet(PDF) 24 Page - STMicroelectronics

Part # AN3324
Description  Implementing power-on self tests
PDF  37 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN3324 Datasheet(HTML) 24 Page - STMicroelectronics

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AN3324
Module software requirements for applicative peripherals
Doc ID 18311 Rev 2
24/37
4
Module software requirements for applicative
peripherals
The ADC, due to its analog part, is the only application peripheral that requires additional
hardware bist after the boot.
This module is part of the temperature measuring safety integrity function, and it is therefore
required that the HWBIST functions are executed once after the boot (please refer to
AN3077, see B.1: Reference documents in Appendix B).
4.1
Analog to Digital Converter (ADC)
After boot and before starting execution of any safety function, user has to execute ADC
HWBIST functions to check if the ADC is functioning correctly and to increase the diagnostic
coverage.
4.1.1
Self test algorithms
Three types of self testing algorithms have been implemented inside ADC analog.
●
Supply self test: Algorithm S.
It includes the conversion of the ADC internal bandgap voltage, ADC supply voltage,
and ADC reference voltage. It includes a sequence of 3 test conversions (steps). The
supply test conversions must be an atomic operation (no functional conversions
interleaved).
●
Resistive-Capacitive self test: Algorithm RC.
It includes a sequence of 19 test conversions (steps) by setting the ADC internal
resistive digital-to-analog converter (DAC).
●
Capacitive self test: Algorithm C.
It includes a sequence of 17 test conversions (steps) by setting the capacitive elements
comprising the sampling capacitor/ capacitive DAC.
The ADC implements an additional test channel dedicated for self testing. It also provides
signals to schedule self testing algorithms using configuration registers, monitors the
converted data using analog watchdog registers, flags the error to FCCU in case some
failure occurs in any of the algorithms.
Note:
User can execute these tests in CPU Mode (One shot or Scan Mode) and in CTU Mode
(see Figure 9: ADC self test in CPU mode using one shot sequence).



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