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UPD17068 Datasheet(PDF) 8 Page - NEC |
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UPD17068 Datasheet(HTML) 8 Page - NEC |
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8 / 341 page ![]() 8 µPD17068 CONTENTS 1. PIN FUNCTIONS ......................................................................................................................... 17 1.1 LIST OF PIN FUNCTIONS .............................................................................................................. 17 1.2 EQUIVALENT CIRCUIT OF EACH PIN .......................................................................................... 21 1.3 HANDLING UNUSED PINS ............................................................................................................ 26 1.4 NOTES ON USE OF THE CE AND INTNC PINS ............................................................................ 28 2. PROGRAM MEMORY (ROM) .................................................................................................... 29 2.1 OUTLINE OF PROGRAM MEMORY .............................................................................................. 29 2.2 PROGRAM MEMORY CONFIGURATION ..................................................................................... 30 2.3 PROGRAM COUNTER .................................................................................................................... 31 2.3.1 Program Counter Configuration .................................................................................. 31 2.3.2 Segment Register (SGR) ............................................................................................... 31 2.4 PROGRAM FLOW ........................................................................................................................... 31 2.4.1 Branch Instructions ........................................................................................................ 31 2.4.2 Subroutines ..................................................................................................................... 32 2.4.3 Table Reference .............................................................................................................. 32 2.4.4 System Call ..................................................................................................................... 32 2.5 NOTES ON USE OF PROGRAM MEMORY .................................................................................. 33 2.5.1 Program Counter and Program Memory Size ........................................................... 33 2.5.2 Last Address of Each Segment .................................................................................... 33 3. ADDRESS STACK (ASK) ............................................................................................................ 34 3.1 OUTLINE OF ADDRESS STACK .................................................................................................... 34 3.2 ADDRESS STACK REGISTERS (ASR) .......................................................................................... 34 3.3 STACK POINTER (SP) .................................................................................................................... 36 3.3.1 Configuration and Function of Stack Pointer ............................................................ 36 3.4 ADDRESS STACK OPERATION ..................................................................................................... 37 3.4.1 Subroutine Call Instruction (“CALL addr” or “CALL @AR”) and Return Instruction (“RET” or “RETSK”) ..................................................................... 37 3.4.2 Table Reference Instruction (“MOVT DBF, @AR”) .................................................... 37 3.4.3 Interrupt Reception and Return Instruction (“RETI”) ............................................... 37 3.4.4 Address Stack Manipulation Instructions (“PUSH AR”, “POP AR”) ...................... 37 3.4.5 System Call Instruction (“SYSCAL entry”) and Return Instruction (“RET” or “RETSK”) ....................................................................................................... 37 3.5 NOTES ON USE OF ADDRESS STACK ........................................................................................ 37 3.5.1 Nesting Level .................................................................................................................. 37 4. DATA MEMORY (RAM) ............................................................................................................. 38 4.1 OUTLINE OF DATA MEMORY ...................................................................................................... 38 4.2 CONFIGURATION AND FUNCTIONS OF DATA MEMORY ....................................................... 39 4.2.1 System Register (SYSREG) ........................................................................................... 39 4.2.2 Data Buffer (DBF) ........................................................................................................... 39 4.2.3 VRAM (Video RAM) for the IDC ................................................................................... 39 4.2.4 Port Register ................................................................................................................... 39 4.2.5 General-Purpose Data memory .................................................................................... 39 4.2.6 Unmounted Data Memory ............................................................................................ 39 |
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