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AN4444 Datasheet(PDF) 51 Page - STMicroelectronics |
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AN4444 Datasheet(HTML) 51 Page - STMicroelectronics |
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51 / 68 page ![]() DocID025925 Rev 2 51/68 AN4444 Design guidelines 68 10 Design guidelines 10.1 PCB layout guidelines 10.1.1 Thermal performance The ST7590 device can operate within the standard industrial temperature range, from -40 to 85 °C ambient temperature. Especially in high ambient temperature conditions, the effect of the power dissipation of the device must be considered to keep it operating in safe conditions. Even if the ST7590 features a built-in thermal shutdown circuitry which turns off the power amplifier (PA) when the die temperature (TJ) exceeds 150 °C, it is recommended not to exceed 125 °C during normal operation to ensure the functionality of the IC. A QFN48 package with an exposed pad has been chosen for the ST7590 device to have a very good thermal performance. However, in order to take full advantage from this, the PCB must be designed to effectively conduct heat away from the package. To get a low impedance thermal path to the PCB, a 5 x 5 mm thermal pad has been realized on the top layer under the device. In order to effectively remove the heat, the exposed pad must be well soldered to the PCB thermal pad. Therefore, the out-gassing phenomenon due to the soldering process must be controlled to reduce solder voids between the QFN48 exposed pad and the PCB thermal pad. To achieve this, smaller multiple openings in the solder paste stencil should be used instead of one big opening on the thermal pad region. This has also the advantage to reduce the amount of solder paste used, thus avoiding bridges with perimeter pads. A suitable example for the QFN48 package is shown in Figure 42. Figure 42. Example of stencil openings for the QFN48 package Another technique to improve heat conduction on the top layer is to fill all unused areas with copper tied to the dissipating ground plane. In order to have an effective heat transfer from the top layer of the PCB to the bottom layer, thermal vias need to be included within the thermal pad area. If properly designed, thermal vias are the most efficient paths for removing heat from the device. 1.35 x 1.35 mm squares Coverage: 68% at 1.65 mm pitch |
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