UPD17232 datasheet(71/92 Pages) NEC

71 / 92 page

Data Sheet U14360EJ1V0DS00

µPD17230, 17231, 17232, 17233, 17234, 17235, 17236

12.2 Legend

: Address register

ASR

: Address stack register specified by stack pointer

addr

: Program memory address (low-order 11 bits)

BANK

: Bank register

CMP

: Compare register

: Carry flag

DBF

: Data buffer

entry

: Entry address of system segment

: Halt releasing condition

INTEF

: Interrupt enable flag

INTR

: Register automatically saved to stack in case of interrupt

INTSK

: Interrupt stack register

: Index register

: Data memory row address pointer

MPE

: Memory pointer enable flag

: Data memory address specified by mR, mC

: Data memory row address (high)

: Data memory column address (low)

: Bit position (4 bits)

n4 :

Immediate data (4 bits)

PAGE

: Page (bit 11 and 12 of program counter)

: Program counter

: Peripheral address

: Peripheral address (high-order 3 bits)

: Peripheral address (low-order 4 bits)

: General register column address

: Register file address

rfR

: Register file row address (high-order 3 bits)

rfC

: Register file column address (low-order 4 bits)

: Stack pointer

: Stop releasing condition

: Window register

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×)

: Contents addressed by

UPD17232 Datasheet(PDF) 71 Page - NEC

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