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AN2870 Datasheet(PDF) 34 Page - STMicroelectronics |
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AN2870 Datasheet(HTML) 34 Page - STMicroelectronics |
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34 / 41 page ![]() Designing with L6585DE AN2870 34/41 Equation 49 These charges must be replaced during the subsequent ON time of the low side transistor: Equation 50 End of life detection Blocking capacitor to GND configuration : In case of blocking capacitor to ground configuration the tracking mode is suggested. In order to set this mode a resistor placed between EOLP and GND is needed: its value has to be chosen as follows: ● 220 k Ω < R eolp < 270 kΩ → VW = 240 mV ● 22 k Ω < R eolp < 27 kΩ → VW = 150 mV EOL pin biasing proceeds as follows: The blocking capacitor mean voltage is half of the PFC output voltage and the CTR pin voltage is equal to: Equation 51 Therefore the voltage divider connected between Cblock and EOL pin should have a divider factor equal to: Equation 52 A capacitor placed in parallel with the lower resistor and placed near the IC helps to keep low the high frequency residual noise. V V Q C C cc boot boot gate Δ − = + min , on DeadTime pre cc boot on boot T T f 2 1 V V ln 1 C R T = ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ − ⋅ < ⎥ ⎥ ⎦ ⎤ ⎢ ⎢ ⎣ ⎡ ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ Δ − ⋅ − = OVP out CTR V V 4 . 3 V ⋅ = OVP out CTR eol V 8 . 6 V V 2 k = ⋅ = |
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