AN2870 datasheet(39/41 Pages) STMICROELECTRONICS

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AN2870

Designing with L6585DE

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4.3

PCB hints

The following rules, considered during the PCB design, help to optimize the performance of

the L6585DE.

In a board containing both PFC and Ballast section four different ground potentials are

present:

PFC signal ground,

PFC power ground

Ballast signal ground and

Ballast power ground.

These traces are usually kept separate and connected together in correspondence of a low

impedance node (the negative terminal of bulk capacitor). A similar rule has to be followed

in the L6585DE: power grounds are to be kept separate and connected to the negative

terminal of the bulk capacitor, signal grounds should be firstly routed to the pin GND (15)

and then the pin 15 is connected to the negative terminal of bulk capacitor. It is very

important that the ground trace relevant to COSC, RRF and CPRE is connected directly to the

GND pin as shortly as possible.

Ballast PCBs are usually long and narrow, therefore current loops are to be minimized

in order to reduce the electromagnetically induced interference between PFC stage

and Ballast Stage. This is very important when wide range application has to be

implemented.

Regions surrounding the gap of the chokes are usually very noisy therefore signal and

ground traces shouldn’t pass underneath these regions.

Traces that connect the gates of the MOSFETs, the OUT pin and the charge pump

components are affected by voltages that vary with very fast edges. They can

capacitively induce noise to closest traces. Therefore if a signal has to pass near these

nodes an increased distance between traces or, eventually, a ground shield has to be

considered.

Ground pin of shunt components should be placed as close as possible to star

connection point or, at least, close together, this avoids errors reading the voltage

across them and current sense traces has to be kept as short as possible in order to

avoid HF noise induction. In the second case is preferable to connect signal GND to the

ground of the shunts instead of the star point.

Bootstrap capacitor and Vcc ceramic capacitor have to be placed as close as possible

to relevant pins.

Error amplifier feedback network must be small and placed near the IC in order to

reduce any loop that can couple radio interference.

The drain of the PFC MOSFET, the anode of Boost Diode and the PFC choke are

connected together as close as possible. In fact this node experienced very fast edges

and also very high currents.

AN2870 Datasheet(PDF) 39 Page - STMicroelectronics

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