Layout hints

AN3118

24/31

Doc ID 16847 Rev 2

5

Layout hints

The layout of any converter is a very important phase in the design process needing

attention by the design engineers as any other design phase. Even if the layout phase looks

sometimes time consuming, a good layout surely saves time during the functional

debugging and the qualification phases. Additionally, a power supply circuit with a correct

layout needs smaller EMI filters or less filter stages and so it allows a consistent cost saving.

Converters using the L6563H do not need any special or specific layout rule to be followed;

just the general layout rules for any power converter which must be applied carefully. the

basic rules are listed below; they can be used for other PFC circuits having any power level,

working either in transition mode or with a fixed off-time control.

1.

Keep power and signal RTN separated. Connect the return pins of components

carrying high current, such as input filter capacitors, sensing resistors, output

capacitors as close as possible. This point is the RTN star point. A downstream

converter will have to be connected to this return point.

2.

Minimize the length of the traces relevant to the boost inductor, MOSFET drain, boost

rectifier and output capacitor.

3.

Keep signal components as close as possible to each L6563H relevant pin. to specify,

keep the tracks relevant to the pin #1 (INV) net as short as possible. Components and

traces relevant to the Error Amplifier must be placed far from traces and connections

carrying signals with high dV/dt, like the MOSFET drain. For high power converters or

very compact PCB layout a 10 nF capacitor connected to pin #8 (PWM_LATCH) and

pin #14 (GND) might be required to decrease the noise picked-up by this pin while it is

in its high impedance status.

4.

Please connect heat sinks to power GND

5.

Add an external copper shield around the boost inductor and connect it to power GND.

This shield helps a lot against conducted and radiated noise also

6.

Please connect the RTN of the signal components including the feedback, PFC_OK

and MULT dividers close to the L6563H pin #14 (GND)

7.

Connect a ceramic capacitor (100÷470 nF) to pin #16 (Vcc) and pin #14 (GND), close

to the L6563H. Connect this point to the RTN star point (see 1).

Figure 37.

EVL6563H-250W TM PFC: PCB layout (SMT side view)