AN3223

The STATUS register and the ATN pin

Doc ID 17553 Rev 2

17/29

6

The STATUS register and the ATN pin

A detailed description of each bit is given in the STCF04 datasheet.

When the STATUS register is latched, reading and writing to the registers is still possible,

but the bits FLASH_ON and TCH_ON in the COMMAND register and AUXL register cannot

be changed until the device is unlatched. It is necessary to read the STATUS register to

unlatch the device.

The ATN pin is also pulled down when the internal timer reaches zero in Flash mode. In this

case the ATN pin is pulled down for 11 µs only. It is recommended to connect the ATN pin to

the interrupt input of the microcontroller. If it is not connected to the interrupt input, the ATN

pin should be polled fast enough so as not to miss the 11 µs pulse; e.g., by a programming

loop which is entered after starting Flash mode. This loop runs until the ATN pin gets low. It

is recommended to make a timeout of such a loop.

The ATN pin is an open drain output and an external pull-up resistor should be connected to

it. The ATN pin is capable of sinking a maximum 3 mA current. This is why the minimum

value of the pull-up resistor connected to it should not be lower than 1.8 k

Ω.

Table 11.

STATUS register bits

Bit name

N/A

F_RUN

FL_R

NTC_W

NTC_H

OT_F

FL_OVR

LTH

MSB

LSB

Table 12.

Effect of the STATUS register bits on the operation of the device

Bit name

F_RUN

STAT_REG

FL_R

STAT_REG

NTC_W

STAT_REG

NTC_H

STAT_REG

OT_F

STAT_REG

FL_OVR

STAT_REG

LTH

STAT_REG

Default

value

00

0

0

0

0

0

NO

NO

YES

YES

YES

NO

NO

Forces

Ready mode

when set

NO

NO

NO

YES

YES

NO

NO

Sets ATN

LOW when

set

NO

YES

YES

YES

YES

YES

NO

1.

YES means that the bit is set by internal signals and is reset to its default value by an I²C read operation of STAT_REG.

NO means that the bit is set and reset by internal signals in real-time.