7

LT3473/LT3473A

3473f

Operation

The LT3473 combines a current mode, fixed frequency

PWM architecture with Burst Mode micropower operation

to maintain high efficiency at light loads. Operation can

best be understood by referring to the Block Diagram.

The reference of the part is determined by the lower of the

internal 1.25V bandgap reference and the voltage at the

CTRL pin. The error amplifier compares voltage at the FB

the hysteretic comparator, A1, shuts off the power section

leaving only the low power circuitry running. Total current

consumption in this state is minimized. As output loading

to enable the power section circuitry. The chip starts switch-

ing. If the load is light, the output voltage (and FB voltage)

will increase until A1 turns off the power section. The output

voltage starts to fall again. This cycle repeats and gener-

ates low frequency ripple at the output. This Burst Mode

operation keeps the output regulated and reduces average

current into the IC, resulting in high efficiency at light load.

If the output load increases sufficiently, A1’s output remains

high, resulting in continuous operation.

At the start of each oscillator cycle, the SR latch is set,

turning on the power switch Q1. A voltage proportional to

the switch current is added to a stabilizing ramp and the

APPLICATIO S I FOR ATIO

200mA/DIV

0.5µs/DIV

3473 AI01

10V/DIV

200mA/DIV

0.5µs/DIV

3473 AI02

10V/DIV

200mV/DIV

500µs/DIV

3473 AI03

200mA/DIV

11mA

1mA

Switching Waveforms

Switching Waveforms

Transient Response

Transient Response

Transient Response

500mV/DIV

500µs/DIV

3473 AI04

500mA/DIV

51mA

1mA

500mV/DIV

500µs/DIV

3473 AI05

500mA/DIV

55mA

5mA

Transient Response

500mV/DIV

200µs/DIV

3473 AI06

500mA/DIV

75mA

25mA

10V/DIV

100µs/DIV

3473 AI07

CAP

0.5V/DIV

SHDN

5V/DIV

10V/DIV

SHDN 20k, 100nF

500µs/DIV

3473 AI08

IL

500mA/DIV

SHDN

2V/DIV

Shutdown Waveforms

Start-Up Waveforms