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AN3123 Datasheet(PDF) 18 Page - STMicroelectronics

Part # AN3123
Description  Using the UART interfaces in the SPEAr embedded MPU family
PDF  30 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN3123 Datasheet(HTML) 18 Page - STMicroelectronics

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UART interrupts
AN3123
18/30
Doc ID 16862 Rev 2
7.3
Interrupt related registers
These are the registers which are used for handling interrupts:
●
INTERRUPT FIFO LEVEL SELECT REGISTER is a 16-bit read-write register. This
register defines the FIFO level at which the UARTTXINTR and UARTRXINTR interrupts
are triggered.
Offset Value: ‘h034
●
INTERRUPT MASK SET/CLEAR REGISTER allows masking and clearing of each
UART interrupt source. Reading from this 16 bit read/write register gives the current
value of the mask on relevant interrupt.
Offset Value: ‘h038
●
RAW INTERRUPT STATUS REGISTER is a read-only register. This register gives the
current raw status value of the corresponding interrupt.
Offset Value: ‘h03C
●
INTERRUPT CLEAR REGISTER is 16 bit write only register. Writing logic 1 to the
relevant bit clears the corresponding interrupt.
Offset Value: ‘h044
●
MASKED INTERRUPT STATUS REGISTER is a 16 bit read-only register which gives
current masked status value of the corresponding interrupt.
Offset Value: ‘h040



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