PM0044 datasheet(27/162 Pages) STMICROELECTRONICS

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PM0044

Pipelined execution

Doc ID 13590 Rev 3

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5.4.3

Pipeline with Call/Jump

In the example shown in Table 10, a branch is taken after the JP/CALL instruction, and the

fetched instruction(s) are lost (flush). New instructions must be fetched. 3 fetch sequences

are required to refill the pre-fetch buffer. The fetch start depends on the instruction being

executed.

For a JP instruction, the fetch can start during the first cycle of the "dummy" execution.

For the CALL instruction, it starts after the last cycle of the CALL execution.

5.4.4

Pipeline stalled

The decode stage can be stalled when the execution lasts more than one cycle.

The flush is due to the branch. Fetching the branch address is performed during the second

execution cycle of the BTJF instruction.

The Decode operation can also be stalled when the memory target is modified during the

previous instruction. In the example given in Table 12, the INCW Y instruction writes the X

Table 10.

Example of pipeline with Call/Jump

Add.

Instruction

Decode

cycles

Execute

cycles

lgth

Cycle

23456

0xC000

INC A

0xC001

JP label

0xC004

LDW X,[$5432.w]

0xD010

label: NEG A

0xD011

CALL label2

0xD014

LDW X,[$5432.w]

0xD018

LDW X,[$7895.w]

F3 FS

0xE030

label2: INCW X

Table 11.

Legend

Symbol/Color

Definition

FFetch

Fetch stalled

DDecode

EExecute

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