LTC6905

9

6905fd

APPLICATIONS INFORMATION

JITTER AND DIVIDE RATIO

At a given output frequency, a higher master oscillator

frequency and a higher divide ratio will result in lower

jitter and higher power supply dissipation. Indeterminate

jitter percentage will decrease by a factor of slightly less

than the square root of the divider ratio, while determinate

jitter will not be similarly attenuated. Please consult the

specification tables and Jitter vs Frequency graph showing

jitter at various divider ratios.

JITTER AND STRAY CAPACITANCE ON THE SET PIN

(PIN 3)

The stray capacitance on the SET pin (Pin 3) should be

limited to 10pF or less to avoid increased jitter or unstable

oscillation.

LTC6905 SUGGESTED CRITICAL COMPONENT LAYOUT

In order to provide the specified performance, it is re-

supply bypass capacitor be placed as close as possible

to the LTC6905. The following additional rules should be

followed for best performance:

1) The bypass capacitor must be placed as close as possible

to the LTC6905, and no vias should be placed between

the capacitor and the LTC6905. The bypass capacitor

must be on the same side of the circuit board as the

LTC6905.

should be closely shared with the bypass capacitor.

of the board from the LTC6905, directly underneath the

bypass capacitor.

3) If a ground plane is used, the connection of the LTC6905

to the ground plane should be as close as possible

to the LTC6905 GND pin and should be composed of

multiple, high current capacity vias.

LTC6905

6905 F02

C

R

Figure 2. LTC6905 Suggested Critical Component Layout